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SH7101 Datasheet(PDF) 230 Page - Renesas Technology Corp |
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SH7101 Datasheet(HTML) 230 Page - Renesas Technology Corp |
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230 / 486 page  8. Multi-Function Timer Pulse Unit (MTU) Rev.2.00 Sep. 27, 2007 Page 196 of 448 REJ09B0394-0200 P φ External clock TCNT input clock TCNT Falling edge Falling edge Rising edge N-1 N N+1 Figure 8.56 Count Timing in External Clock Operation (Phase Counting Mode) Output Compare Output Timing: A compare match signal is generated in the final state in which TCNT and TGR match (the point at which the count value matched by TCNT is updated). When a compare match signal is generated, the output value set in TIOR is output at the output compare output pin (TIOC pin). After a match between TCNT and TGR, the compare match signal is not generated until the TCNT input clock is generated. Figure 8.57 shows output compare output timing (normal mode and PWM mode) and figure 8.58 shows output compare output timing (complementary PWM mode and reset synchronous PWM mode). TGR TCNT TCNT input clock N N N+1 Compare match signal TIOC pin P φ Figure 8.57 Output Compare Output Timing (Normal Mode/PWM Mode) |
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