HD6433644R datasheet(135/549 Pages) RENESAS

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Section 6 ROM

Rev. 6.00 Sep 12, 2006 page 115 of 526

REJ09B0326-0600

6.5

Flash Memory Register Descriptions

6.5.1

Flash Memory Control Register (FLMCR)

FLMCR is an 8-bit register used for flash memory operating mode control. Transitions to program

mode, erase mode, program-verify mode, and erase-verify mode are made by setting bits in this

standby mode, and when 12 V is not applied to FVPP. When 12 V is applied to FVPP, a reset

initializes FLMCR to H'80.

Bit

VPP



Initial value

Read/Write



R/W*

Note:

* For information on access to this register, see note 11 in section 6.9, Flash Memory

Programming and Erasing Precautions.

Bit 7



Programming Power (VPP): Bit 7 is a status flag that indicates that 12 V is applied to the

FVPP pin. For further information, see note 5 in section 6.9, Flash Memory Programming and

Erasing Precautions.

Bit 7: VPP

Description

Clearing condition:

(initial value)

When 12 V is not applied to the FVPP pin

Setting condition:

When 12 V is applied to the FVPP pin

Bit 3



Erase-Verify Mode (EV)*: Bit 3 selects transition to or exit from erase-verify mode.

Bit 3: EV

Description

Exit from erase-verify mode

(initial value)

Transition to erase-verify mode

Note:

* Do not set multiple bits simultaneously.

Do not release or cut the VCC or VPP power supply while a bit is set.

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