SH7021 datasheet(192/509 Pages) RENESAS

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9.2.3

DMA Transfer Count Registers 0–3 (TCR0–TCR3)

DMA transfer count registers 0-3 (TCR0–TCR3) are 16-bit read/write registers that specify the

DMA transfer count (bytes or words). The number of transfers is 1 when the setting is H'0001,

65535 when the setting is H'FFFF and 65536 (the maximum) when H'0000 is set. During a DMA

transfer, these registers indicate the remaining transfer count. The initial value after resets or in

standby mode is undefined.

Bit:

Bit name:

Initial value:

—

R/W:

R/W

Bit:

Bit name:

Initial value:

—

R/W:

R/W

9.2.4

DMA Channel Control Registers 0–3 (CHCR0–CHCR3)

DMA channel control registers 0–3 (CHCR0–CHCR3) are 16-bit read/write registers that control

the DMA transfer mode. They also indicate DMA transfer status. They are initialized to H'0000 by

a reset or standby mode.

Bit:

Bit name:

DM1

DM0

SM1

SM0

RS3

RS2

RS1

RS0

Initial value:

R/W:

R/W

Bit:

Bit name:

Initial value:

R/W:

R/(W)*2

R/W

R/(W)*

R/W

Notes: 1. Write only 0 to clear the flag.

2. Writing is effective only for CHCR0 and CHCR1.

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