3886 datasheet(4/380 Pages) RENESAS

4 / 380 page

Rev.

No.

date

1.0

First Edition

990215

2.0

•Explanations of “1. Organization” of “BEFORE USING THIS MANUAL” are partly revised.

000922

•Page 1-2; Explanations of “qPower dissipation” of “FEATURES” are partly eliminated.

•Page 1-2; Explanations of “qMemory expansion possible” of “FEATURES” are partly revised.

•Page 1-2; Value of “qProgram/Erase voltage” of “<Flash memory mode>” is revised.

•Page 1-2; “Operating temperature range” of “<Flash memory mode>” is added.

•Page 1-2; Explanations of “sNotes” are partly revised.

•Page 1-2; Explanations of “APPLICATION” are partly added.

•Page 1-3; Product name and note into Figure 1 are partly added.

•Page 1-3; Note into Figure 2 is added.

•Page 1-4; Figure 3 is added.

•Page 1-5; Figure 4 is partly revised.

•Page 1-8; Figure 5 is partly revised.

•Page 1-9; Explanations of “Packages” are partly added.

•Page 1-9; Figure 6 is partly revised.

•Page 1-9; Table 3 is partly added.

•Page 1-13; Figure 9 is partly revised.

•Page 1-14; Notes into Figure 10 are partly revised.

•Page 1-16; “Related SFRs” of “P42/INT0/OBF00, P43/INT1/OBF01” into Table 6 are partly

added.

••Page 1-42; “[Port Control Register 2 (PCTL2)]” are added.

•Page 1-46; Explanations of “Bit 5” of “[I2c Clock Control Register (S2)]” are partly revised.

•Page 1-48; Bit name of bit 4 of “[I2c Status Register (S1)]” is revised.

•Page 1-49; Bit name of bit 4 into Figure 41 is revised.

•Page 1-54; Explanations of “(3) RESTART condition generating procedure” are partly revised.

•Page 1-54; “(6) STOP condition input at 7th clock pulse” is added.

•Page 1-54; “(7) ES0 bit switch” is added.

•Page 1-55; Figure 50 is partly revised.

REVISION DESCRIPTION LIST

3886 GROUP USER’S MANUAL

(1/6)

Revision Description

3886 Datasheet(PDF) 4 Page - Renesas Technology Corp