3886 datasheet(65/380 Pages) RENESAS

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HARDWARE

1-40

3886 Group User’s Manual

Fig. 35 Structure of bus interface related register

FUNCTIONAL DESCRIPTION

Data bus buffer control register

Data bus buffer enable bit

0 : P50–P53, P8 I/O port

1 : Data bus buffer enabled

Data bus buffer function selection bit

0 : Single data bus buffer mode (P47 functions as I/O port.)

1 : Double data bus buffer mode (P47 functions S1 input.)

OBF0 output selection bit

0 : OBF00 valid

1 : OBF01 valid

OBF00 output enable bit

0 : P42 functions as port I/O pin.

1 : P42 functions as OBF00 output pin.

OBF01 output enable bit

0 : P43 functions as port I/O pin.

1 : P43 functions as OBF01 output pin.

OBF10 output enable bit

0 : P46 functions as port I/O pin.

1 : P46 functions as OBF10 output pin.

Input level selection bit

0 : CMOS level input

1 : TTL level input

Reserved

Do not write “1” to this bit.

Data bus buffer status register 1

Output buffer full flag 1 (OBF1)

Input buffer full flag 1 (IBF1)

User definable flag (U12)

A01 flag (A01)

User definable flag (U14–U17)

This flag can be defined by user freely.

This flag indicates the condition of A01 status

when the IBF1 flag is set.

0 : Buffer empty

1 : Buffer full

0 : Buffer empty

1 : Buffer full

Data bus buffer status register 0

Output buffer full flag 0 (OBF0)

Input buffer full flag 0 (IBF0)

User definable flag (U02)

A00 flag (A00)

This flag can be defined by user freely.

This flag indicates the condition of A00 status

when the IBF0 flag is set.

0 : Buffer empty

1 : Buffer full

0 : Buffer empty

1 : Buffer full

(DBBCON : address 002A16)

(DBBSTS0 : address 002916)

User definable flag (U04–U07)

(DBBSTS1 : address 002C16)

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