3886 datasheet(42/380 Pages) RENESAS

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3886 Group User’s Manual

HARDWARE

Notes1: For details of the functions of ports P0 to P3 in modes other than single-chip mode, and how to use double-function ports as function I/O ports, refer

to the applicable sections.

2: Make sure that the input level at each pin is either 0 V or VCC during execution of the STP instruction.

When an input level is at an intermediate potential, a current will flow from VCC to VSS through the input-stage gate.

Name

Input/Output

I/O Format

Non-Port Function

Ref.No.

Table 7 I/O port function (2)

Related SFRs

P50/A0

P51/INT20

/S0

P52/INT30

P53/INT40

P54/CNTR0

P55/CNTR1

P56/DA1/

PWM01

P57/DA2/

PWM11

P60/AN0–

P67/AN7

P70/SIN2

P71/SOUT2

P72/SCLK2

P73/SRDY2/

INT21

P74/INT31

P75/INT41

P76/SDA

P77/SCL

P80/DQ0–

P87/DQ7

Port P5

Port P6

Port P7

Port P8

Input/output,

individual bits

CMOS compatible

input level

CMOS 3-state output

(when selecting bus

interface function)

CMOS compatible

input level or TTL

input level

CMOS compatible

input level

CMOS 3-state output

CMOS compatible

input level or TTL

input level

N-channel open-drain

output

CMOS compatible

input level

N-channel open-drain

output

(when selecting I2C-

BUS interface

function)

CMOS compatible

input level or SMBUS

input level

CMOS compatible

input level

CMOS 3-state output

(when selecting bus

interface function)

CMOS compatible

input level or TTL

input level

Bus interface function

input

External interrupt input

Bus interface function

input

Timer X, timer Y func-

tion I/O

D-A converter output

PWM output

A-D converter input

Serial I/O2 function I/O

Serial I/O2 function out-

put

Bus interface function

input

External interrupt input

I2C-BUS interface func-

tion I/O

Bus interface function

I/O

Data bus buffer control

Interrupt edge selection

Data bus buffer control

Timer XY mode register

AD/DA control register

UART control register

AD/DA control register

Serial I/O2 control

Port control register 2

Serial I/O2 control

Port control register 2

Interrupt edge selection

Port control register 2

I2C control register

Data bus buffer control

(15)

(16)

(17)

(18)

(19)

(20)

(21)

(22)

(23)

(24)

(25)

(26)

(27)

(28)

FUNCTIONAL DESCRIPTION

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