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AM3892 Datasheet(PDF) 164 Page - Texas Instruments |
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AM3892 Datasheet(HTML) 164 Page - Texas Instruments |
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164 / 299 page  DDR[x]_CLK[1] DQ7 DQ0 DM/TQS DQS DQS DQ7 DQ0 DM/TQS DQS DQS CK DDR[x]_D[31] DDR[x]_D[24] 8-Bit DDR3 Devices 0.1 µF NC 50 2 (± %) 0.1 µF 0.1 µF 32-bit DDR3 EMIF DDR[0] or DDR[1] DDR[x]_CLK[1] DDR[x]_ODT[1] DDR[x]_CS[1] DDR[x]_DQM[3] DDR[x]_DQS[3] DDR[x]_DQS[3] DDR[x]_D[23] DDR[x]_D[16] DDR[x]_DQM[2] DDR[x]_DQS[2] DDR[x]_DQS[2] DDR[x]_D[15] DDR[x]_D[8] DDR[x]_DQM[1] DDR[x]_DQS[1] DDR[x]_DQS[1] DDR[x]_D[7] DDR[x]_D[0] DDR[x]_DQM[0] DDR[x]_DQS[0] DDR[x]_DQS[0] DDR[x]_CLK[0] DDR[x]_CLK[0] DDR[x]_ODT[0] DDR[x]_CS[0] DDR[x]_BA[0] DDR[x]_BA[1] DDR[x]_BA[2] DDR[x]_A[0] DDR[x]_A[14] DDR[x]_CAS DDR[x]_RAS DDR[x]_WE DDR[x]_CKE DDR[x]_RST VREFSSTL_DDR[x] DDR[x]_VTP NC NC NC 8 8 8 8 15 CK ODT BA1 BA0 BA2 CS A0 A14 CAS RAS WE RST CKE ZQ VREFDQ VREFCA ZQ CK CK ODT BA1 BA0 BA2 CS A0 A14 CAS RAS WE RST CKE ZQ VREFDQ VREFCA Termination is required. See terminator comments. Zo Value determined according to the DDR memory device data sheet. ZQ DQ7 DQ0 DM/TQS DQS DQS CK DQ7 DM/TQS DQS DQS 8-Bit DDR3 Devices 0.1 µF 0.1 µF DQ0 CK ODT BA1 BA0 BA2 CS A0 A14 CAS RAS WE RST CKE ZQ VREFDQ VREFCA CK CK ODT BA1 BA0 BA2 CS A0 A14 CAS RAS WE RST CKE ZQ VREFDQ VREFCA ZQ Zo Zo Zo Zo DDR_VREF DDR_VTT DDR_1V5 ZQ ZQ TDQS NC NC TDQS TDQS NC TDQS NC 0.1 µF AM3894 AM3892 SPRS681A – OCTOBER 2010 – REVISED MARCH 2011 www.ti.com Figure 8-14. 32-Bit, One-Bank DDR3 Interface Schematic Using Four 8-Bit DDR3 Devices 164 Peripheral Information and Timings Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM3894 AM3892 |
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