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AM3892 Datasheet(PDF) 266 Page - Texas Instruments |
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AM3892 Datasheet(HTML) 266 Page - Texas Instruments |
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266 / 299 page  AM3894 AM3892 SPRS681A – OCTOBER 2010 – REVISED MARCH 2011 www.ti.com 8.16 Secure Digital/Secure Digital Input Output (SD/SDIO) The device SD/SDIO Controller has following features: • Secure Digital (SD) memory card with Secure Data I/O (SDIO) • Supports SDHC (SD high capacity) • SD/SDIO protocol support • Programmable clock frequency • 1024 byte read/write FIFO to lower system overhead • Slave DMA transfer capability • Full compliance with SD command/response sets, as defined in the SD physical layer specification v2.00 • Full compliance with SDIO command/response sets and interrupt/read-wait suspend-resume operations, as defined in the SD part E1 specification v 2 .00 • Full compliance with SD host controller standard specification sets as defined in the SD card specification part A2 v2.00. For more detailed information on SD/SDIO, see the SD/SDIO chapter in the AM38x Sitara ARM Microprocessors (MPUs) Technical Reference Manual (literature number SPRUGX7). 8.16.1 SD/SDIO Peripheral Register Descriptions Table 8-90. SD/SDIO Registers(1) HEX ADDRESS ACRONYM REGISTER NAME 0x4806 0000 SD_HL_REV IP Revision Identifier 0x4806 0004 SD_HL_HWINFO Hardware Configuration 0x4806 0010 SD_HL_SYSCONFIG Clock Management Configuration 0x4806 0110 SD_SYSCONFIG System Configuration 0x4806 0114 SD_SYSSTATUS System Status 0x4806 0124 SD_CSRE Card status response error 0x4806 0128 SD_SYSTEST System Test 0x4806 012C SD_CON Configuration 0x4806 0130 SD_PWCNT Power counter 0x4806 0200 SD_SDMASA SDMA System address: 0x4806 0204 SD_BLK Transfer Length Configuration 0x4806 0208 SD_ARG Command argument 0x4806 020C SD_CMD Command and transfer mode 0x4806 0210 SD_RSP10 Command Response 0 and 1 0x4806 0214 SD_RSP32 Command Response 2 and 3 0x4806 0218 SD_RSP54 Command Response 4 and 5 0x4806 021C SD_RSP76 Command Response 6 and 7 0x4806 0220 SD_DATA Data 0x4806 0224 SD_PSTATE Present state 0x4806 0228 SD_HCTL Host Control 0x4806 022C SD_SYSCTL SD system control 0x4806 0230 SD_STAT Interrupt status 0x4806 0234 SD_IE Interrupt SD enable 0x4806 0238 SD_ISE 0x4806 023C SD_AC12 Auto CMD12 Error Status 0x4806 0240 SD_CAPA Capabilities 0x4806 0248 SD_CUR_CAPA Maximum current capabilities (1) SD/SDIO registers are limited to 32-bit data accesses; 16-bit and 8-bit accesses are not allowed and can corrupt register content. 266 Peripheral Information and Timings Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM3894 AM3892 |
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