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33910 Datasheet(PDF) 66 Page - Freescale Semiconductor, Inc

Part # 33910
Description  LIN System Basis Chip with High
PDF  90 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

33910 Datasheet(HTML) 66 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
66
33910
FUNCTIONAL DESCRIPTION
INTRODUCTION
MC33910BAC / MC34910BAC
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 33910 is designed and developed as a highly
integrated and cost-effective solution for automotive and
industrial applications. For automotive body electronics, the
33910 is well suited to perform keypad applications via the
LIN bus.
Two power switches are provided on the device configured
as high side outputs. Other ports are also provided, which
include a wake-up capable pin amd a Hall Sensor port
supply. An internal voltage regulator provides power to a
MCU device.
Also included in this device is a LIN physical layer, which
communicates using a single wire. This enables this device
to be compatible with 3-wire bus systems, where one wire is
used for communication, one for battery, and one for ground.
FUNCTIONAL PIN DESCRIPTION
See Table 1, 33910 Simplified Application Diagram, for a
graphic representation of the various pins referred to in the
following paragraphs. Also, see the 33910 Pin Connections
for a description of the pin locations in the package.
RECEIVER OUTPUT (RXD)
The RXD pin is a digital output. It is the receiver output of
the LIN interface and reports the state of the bus voltage:
RXD low when LIN bus is dominant, RXD high when LIN bus
is recessive.
TRANSMITTER INPUT (TXD)
The TXD pin is a digital input. It is the transmitter input of
the LIN interface and controls the state of the bus output
(dominant when TXD is Low, recessive when TXD is High).
This pin has an internal pull-up to force recessive state in
case the input is left floating.
LIN BUS (LIN)
The LIN pin represents the single-wire bus transmitter and
receiver. It is suited for automotive bus systems and is
compliant to the LIN bus specification 2.0.
The LIN interface is only active during Normal and Normal
Request modes.
SERIAL DATA CLOCK (SCLK)
The SCLK pin is the SPI clock input pin. MISO data
changes on the negative transition of the SCLK. MOSI is
sampled on the positive edge of the SCLK.
MASTER OUT SLAVE IN (MOSI)
The MOSI digital pin receives SPI data from the MCU. This
data input is sampled on the positive edge of SCLK.
MASTER IN SLAVE OUT (MISO)
The MISO pin sends data to an SPI-enabled MCU. It is a
digital tri-state output used to shift serial data to the
microcontroller. Data on this output pin changes on the
negative edge of the SCLK. When CS is High, this pin will
remain in high-impedance state.
CHIP SELECT (CS)
CS is a active low digital input. It must remain low during a
valid SPI communication and allow for several devices to be
connected in the same SPI bus without contention. A rising
edge on CS signals the end of the transmission and the
moment the data shifted in is latched. A valid transmission
must consist of 8 bits only.
While in STOP mode a low-to-high level transition on this
pin will generate a wake-up condition for the 33910.
ANALOG MULTIPLEXER (ADOUT0)
The ADOUT0 pin can be configured via the SPI to allow
the MCU A/D converter to read the several inputs of the
Analog Multiplexer, including the L1 input voltage and the
internal junction temperature.
PWM INPUT CONTROL (PWMIN)
This digital input can control the high sides in Normal
Request and Normal mode.
To enable PWM control, the MCU must perform a write
operation to the high side control register (HSCR).
This pin has an internal 20
μA current pull-up.
RESET (RST)
This bidirectional pin is used to reset the MCU in case the
33910 detects a reset condition or to inform the 33910 that
the MCU has just been reset. After release of the RST pin
Normal Request mode is entered.
The RST pin is an active low filtered input and output
formed by a weak pull-up and a switchable pull-down
structure which allows this pin to be shorted either to VDD or
to GND during software development without the risk of
destroying the driver.



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