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S25FS256S Datasheet(PDF) 134 Page - SPANSION

Part # S25FS256S
Description  MirrorBit Flash Non-Volatile Memory
PDF  154 Pages
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Manufacturer  SPANSION [SPANSION]
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S25FS256S Datasheet(HTML) 134 Page - SPANSION

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S25FS-S Family
S25FS-S_00_04 November 6, 2013
Data
Sheet
(Pre limin ar y)
11. Embedded Algorithm Performance Tables
The Joint Electron Device Engineering Council (JEDEC) standard JESD22-A117 defines the procedural
requirements for performing valid endurance and retention tests based on a qualification specification. This
methodology is intended to determine the ability of a flash device to sustain repeated data changes without
failure (program/erase endurance) and to retain data for the expected life (data retention). Endurance and
retention qualification specifications are specified in JESD47 or may be developed using knowledge-based
methods as in JESD94.
Notes:
1. Not 100% tested.
2. Typical program and erase times assume the following conditions: 25°C, VDD = 1.8V; random data pattern.
3. The programming time for any OTP programming command is the same as tPP. This includes OTPP 42h, PNVDLR 43h, ASPP 2Fh, and
PASSP E8h.
4. The programming time for the PPBP E3h command is the same as tPP. The erase time for PPBE E4h command is the same as tSE.
5. Data retention of 20 years is based on 1k erase cycles or less.
Table 11.1 Program and Erase Performance
Symbol
Parameter
Min
Typ (2)
Max
Unit
tW
Non-Volatile Register Write Time
145
750
ms
tPP
Page Programming (512 bytes)
Page Programming (256 bytes)
475
360
1080
1080
µs
tSE
Sector Erase Time (64-kB or 4-kB physical sectors)
145
725
ms
Sector Erase Time (256-kB logical sectors = 4x64K physical sectors)
580
2900
ms
tBE (1)
Bulk Erase Time (S25FS128S)
36
180
sec
tBE (1)
Bulk Erase Time (S25FS256S)
72
360
sec
tEES
Evaluate Erase Status Time (64-kB or 4-kB physical sectors)
20
25
µs
Evaluate Erase Status Time (256-kB physical or logical sectors)
80
100
Erase per sector
100,000
cycles
Table 11.2 Program or Erase Suspend AC Parameters
Parameter
Typical
Max
Unit
Comments
Suspend Latency (tSL)
40
µs
The time from Suspend command until the WIP
bit is 0.
Resume to next Program Suspend (tRS)
100
µs
Minimum is the time needed to issue the next
Suspend command but
≥ typical periods are
needed for Program or Erase to progress to
completion.



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