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AMD-K6 Datasheet(PDF) 137 Page - Advanced Micro Devices |
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AMD-K6 Datasheet(HTML) 137 Page - Advanced Micro Devices |
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137 / 346 page ![]() Chapter 5 Signal Descriptions 119 20695H/0—March 1998 AMD-K6® Processor Data Sheet Preliminary Information Table 18. Bus Cycle Definition Bus Cycle Initiated Generated by Processor Generated by System M/IO# D/C# W/R# CACHE# KEN# Code Read, Instruction Cache Line Fill 1000 0 Code Read, Noncacheable 1001 x Code Read, Noncacheable 1 0 0 x 1 Encoding for Special Cycle 0011 x Interrupt Acknowledge 0001 x I/O Read 0101 x I/O Write 0111 x Memory Read, Data Cache Line Fill 1100 0 Memory Read, Noncacheable 1101 x Memory Read, Noncacheable 1 1 0 x 1 Memory Write, Data Cache Writeback 1110 x Memory Write, Noncacheable 1111 x Note: x means “don’t care” Table 19. Special Cycles Special Cycle Stop Grant 111 111 011 001 1 x Flush Acknowledge (FLUSH# sampled asserted) 011 101 111 001 1 x Writeback (WBINVD instruction) 011 110 111 001 1 x Halt 011 111 011 001 1 x Flush (INVD, WBINVD instruction) 011 111 101 001 1 x Shutdown 011 111 110 001 1 x Note: x means “don’t care” |
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