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UPD78C18 Datasheet(PDF) 24 Page - NEC |
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UPD78C18 Datasheet(HTML) 24 Page - NEC |
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24 / 110 page ![]() 24 µPD78C17,78C18 (2) PB7 to PB0 (PORT B) Like port A, port B is an 8-bit input/output port with input/output buffer and output latch functions. Port B can be set as an input or output port bit-wise using the MODE B register (MB). µPD78C18 port B pull-up resistor specification is performed bit-wise by mask option. Port B is set as follows when setting the input port or after reset. High-impedance : Without pull-up resistor High level : With pull-up resistor As with port A, direct bit setting/resetting of port B output latch contents is possible by an arithmetic or logical operation instruction without the use of an accumulator. Data transfer to/from an accumulator is also possible. • MODE B Register (MB) Like the MODE A register, the MODE B register is an 8-bit register which specifies port B input/ output bit-wise. After RESET input or in the hardware STOP mode, all the bits are set (1), and port B is in the input mode resulting in the status below. High-impedance : Without pull-up resistor High level : With pull-up resistor Fig. 2-9 Mode B Register Format MB 7 MB 6 MB 5 MB 4 MB 3 MB 2 MB 1 (n = 0 to 7) PBn = Output PBn = Input MB 0 76543210 0 1 |
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