UPD78C18 datasheet(17/110 Pages) NEC

17 / 110 page

µPD78C17,78C18

(c)

Accumulator (A)

In the

µPD78C17 and 78C18, because an accumulator type architecture is used, 8-bit data processing

such as 8-bit arithmetic and logical operation instructions is mainly performed by this accumulator.

This accumulator can be replaced with the ALT register paired with the vector register (V) by means of

the EXA instruction.

(d)

Expansion accumulator (EA)

16-bit data processing such as 16-bit arithmetic and logical operation instructions is mainly performed

by EA.

This accumulator can be replaced with the ALT register EA’ by means of the EXA instruction.

(e)

Program counter (PC)

This is a 16-bit register which holds information on the next program address to be executed. This

fetched. When an instruction associated with a branch is executed, immediate data or register contents are

loaded. RESET input clears this counter to 0000H.

(f)

Stack pointer (SP)

This is a 16-bit register which holds the start address of the memory stack area (LIFO format).

SP contents are decremented when a CALL or PUSH instruction is executed or an interrupt is generated,

and incremented when a RETURN or POP instruction is executed.

2.2

ARITHMETIC LOGIC UNIT (ALU) ...16 BITS

The ALU executes data processing such as 8-bit arithmetic and logical operations, shift and rotation, data

processing such as 16-bit arithmetic and logical operations and shift operations, 8-bit multiplication and 16-bit

by 8-bit division.

2.3

PROGRAM STATUS WORD (PSW)

This word consists of 6 types of flags which are set/reset according to instruction execution results. Three of

these flags (Z, HC, and CY) can be tested by an instruction. PSW contents are automatically saved to the stack

when an interrupt (external, internal, or SOFTI instruction) is generated, and restored by the RETI instruction.

RESET input resets all bits to (0).

Fig. 2-2 PSW Configuration

(a)

Z (Zero)

When the operation result is zero, this flag is set (1). In all other cases, it is reset (0).

(b) SK (Skip)

When the skip condition is satisfied, this flag is set (1). If the condition is not satisfied, it is reset (0).

(c)

HC (Half Carry)

If an 8-bit operation generates a carry out of bit 3 or a borrow into bit 3, this flag is set (1). In all other

cases, it is reset (0).

(d) L1

When the “MVI A, byte” instruction is stacked, this flag is set (1). In all other cases, it is reset (0).

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UPD78C18 Datasheet(PDF) 17 Page - NEC

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