UPD78C18 datasheet(52/110 Pages) NEC

52 / 110 page

µPD78C17,78C18

2.9

ANALOG/DIGITAL CONVERTER

The

µPD78C17 and 78C18 have on-chip 8-bit high-speed and high-resolution analog/digital (A/D) converter

with 8-multiplexed analog input (AN7 to AN0), and 4 “Conversion Result” registers (CR0 to CR3) to retain a

conversion result. This A/D converter uses the successive approximation method.

In the A/D converter operation, either the scan mode or select mode can be selected by software.

In the select mode, one of analog inputs is selected by the A/D channel mode register before starting A/D

conversion. Conversion values are stored to CR0 through CR3 sequentially. In the scan mode, Analog conver-

sion values AN0 to AN3 or AN4 to AN7 are stored to CR0 through CR3 sequentially. This mode switchover is

specified by the A/D channel mode register.

In case of the select mode, one of the analog inputs is selected by the A/D channel mode register and the A/

D conversion starts. Conversion values are stored to CR0 through CR3 sequentially. When four CR registers are

set to conversion values, the internal interrupt (INTAD) is generated. The A/D converter continues A/D conver-

sion and sequential storage of conversion values beginning with CR0 until the A/D channel mode register is

changed.

In case of the scan mode, the analog input AN0 to AN3 (ANI2 = 0) or AN4 to AN7 (ANI2 = 1) can be selected.

If bit 3 (ANI2) of the A/D channel mode register is set to “0”, analog inputs AN0, AN1, AN2, AN3 and AN0

are selected in that order. These input A/D conversion values CR0, CR1, CR2, CR3, and CR0 are stored in that

order. If ANI2 of the A/D channel mode register is set to “1”, analog inputs AN4, AN5, AN6, AN7, and AN4 are

selected in that order, and these input A/D conversion values CR0, CR1, CR2, CR3, and CR0 in that order. In the

scan mode, like in the select mode, when four CR registers are set to conversion values, the internal interrupt

(INTAD) is generated.

In the scan mode, too, the above-mentioned operation is repeated until the A/D channel mode register is

changed.

By setting (1) bit 0 (MKAD) of the interrupt mask register (MKH), the internal interrupt (INTAD) is disabled.

UPD78C18 Datasheet(PDF) 52 Page - NEC