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UPD78C18 Datasheet(PDF) 22 Page - NEC |
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UPD78C18 Datasheet(HTML) 22 Page - NEC |
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22 / 110 page ![]() 22 µPD78C17,78C18 2.5 PORT FUNCTIONS (1) PA7 to PA0 (PORT A) This is an 8-bit input/output port which has input/output buffer and output latch functions. Port A can be set as to input or output bit-wise using the MODE A register. And µPD78C18 port A pull-up resistor specification is performed bit-wise by mask option. Port A is set as follows when setting the input port or after reset. High-impedance : Without pull-up resistor High level : With pull-up resistor Fig. 2-5 Port A (a) When specified as output port (MAn = 0) The output latch is effective, enabling data exchange by a transfer instruction between the output latch and the accumulator. Direct bit setting/resetting of output latch contents is possible by an arithmetic or logical operation instruction without the use of an accumulator. Once data is written to the output latch, the data is held until a port A manipulation instruction is executed or the data is reset. Fig. 2-6 Port A Specified as Output Port Note Only µPD78C18 V DD MAn Latch WRM Output Latch WRP RDO RDI Output Buffer Mask OptionNote PAn V DD Output Latch WRP RDO Mask OptionNote PAn Note Only µPD78C18 |
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