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SEC2410 Datasheet(PDF) 82 Page - Microchip Technology |
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SEC2410 Datasheet(HTML) 82 Page - Microchip Technology |
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82 / 283 page ![]() SEC2410/SEC4410 DS00001587C-page 82 2013 - 2014 Microchip Technology Inc. 11.6.2.1 Event Mode Operation The timer starts counting events when the ENABLE bit in the Timer Control Register is set and continues to count until the ENABLE bit is cleared. When the ENABLE bit is set, the timer continues counting from the current value in the timer except after a reset event. After a reset event, the timer always starts counting from the value programmed in the Reload Register if counting down or from 0000h if counting up. Figure 11-6 shows an example of timer operation in Event mode. The RLOAD bit controls the behavior of the timer when it underflows or overflows. 11.6.3 ONE-SHOT MODE The One-Shot mode of the timer is used to generate a single interrupt to the EC after a specified amount of time. The timer can be configured to start using the ENABLE bit (Figure 11-7) or on a timer overflow event from the previous timer. See Section 11.8.2, "Timer x Clock and Event Control Register," on page 87 for configuration details. The ENABLE bit must be set for an event to start the timer. The ENABLE bit is cleared one clock after the timer starts. The timer always starts from the value in the Reload Register and counts down in One-Shot mode. FIGURE 11-6: EVENT MODE OPERATION TABLE 11-5: ONE SHOT MODE OPERATIONAL SUMMARY Item Description Timer Clock Frequencies This mode supports all the programmable frequencies listed in Table 11-10, “Timer Clock Frequencies,” on page 88 Filter Clock Frequencies This mode supports all the programmable frequencies listed in Table 11-10, “Timer Clock Frequencies,” on page 88 Count Operation Down Counter Reload Operation When the timer underflows the timer will stop. When the timer is enabled timer starts counting from value programmed in Timer Reload Register. (RLOAD has no effect in this mode) Count Start Condition Setting the ENABLE bit to 1 starts One-Shot mode. The timer clock automatically clears the enable bit one timer tick later. Note: One-Shot mode may be enabled in Event Mode. In Event mode an overflow from the previous timer is used for timer tick rate. Count Stop Condition • Timer is reset (RESET = 1) • Timer underflows Interrupt Request Generation Timing When an underflow occurs. TINx Pin Function One Shot External input TOUTx Pin Function The TOUTx pin is asserted when the timer starts and de-asserted when the timer stops Read From Timer Current count value can be read by reading the Timer Count Register Timer Value Timer Enable Bit Event Input Up/Down Bit A9FFh 0001h 0000h A9FFh AA00h 80C5h 80C3h AA00h 0000h AA00h A9FFh AA00h Timer Interrupt 80C4h AA01h FFFEh FFFFh AA00h |
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