SEC2410 datasheet(17/283 Pages) MICROCHIP

17 / 283 page

 2013 - 2014 Microchip Technology Inc.

DS00001587C-page 17

SEC2410/SEC4410

SPI_CEN

I/O12

SPI Chip Enable

Active low chip enable output. If the SPI interface is

enabled, this pin must be driven high in power down

states.

SPI_CLK/

GPIO4

I/O12

SPI Clock Out

Clock signal out to the serial ROM.

Note:

During reset, this pin must be driven low.

SPI_DO/

I/O12

SPI Serial Data Out

The output for the SPI port.

(SPD_SEL)/

GPIO5

SPI Speed Select

Selects the speed of the SPI interface. During RESET_N

assertion, this pin will be tri-stated with the weak pull-

down resistor enabled.

When RESET_N is negated, the value on the pin will be

internally latched, and the pin will revert to SPI_DO

functionality, where the internal pull-down will be

disabled.

: 30 MHz (no external resistor should be applied)

: 60 MHz (a 10 k

Ω external pull-up resistor must be

applied)

If the latched value is 1, then the pin is tri-stated when

the chip is in the suspend state. If the latched value is 0,

then the pin is driven low during a suspend state.

SPI_DI/

GPIO2

I/O12PD

SPI Serial Data In

The SPI data in to the controller from the ROM. This pin

has a weak internal pull-down applied at all times to

prevent floating.

CRFILT

+1.2 V Core Power Bypass

This pin must have a 1.0

μF (or greater) ± 20% (ESR <

0.1

Ω) capacitor to VSS.

VDD33

3.3 V Power

JTAG_TMS

JTAG Mode Select

The JTAG mode select to the internal debug/test

controller, which must have a pull-up resistor enabled

during normal operation. The pull-up and the input must

be disabled during reset.

JTAG_TDO

O12

JTAG Data Out

The JTAG data out from the internal debug/test

controller, which must be disabled during reset.

JTAG_TDI

JTAG Data In

The JTAG data in to the internal debug/test controller,

which must have a pull-up resistor enabled during

normal operation. The pull-up and the input must be

disabled during reset.

JTAG_TCK

JTAG Clock

The JTAG clock input to the internal debug/test

controller, which must have a pull-up resistor enabled

during normal operation. The pull-up and the input must

be disabled during reset.

TABLE 3-3:

SEC2410 PIN DESCRIPTIONS (CONTINUED)

Name

Buffer type

Description

64-QFN 72-QFN

SEC2410 Datasheet(PDF) 17 Page - Microchip Technology

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