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LAN9250 Datasheet(PDF) 246 Page - Microchip Technology |
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LAN9250 Datasheet(HTML) 246 Page - Microchip Technology |
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246 / 421 page  LAN9250 DS00001913A-page 246 2015 Microchip Technology Inc. 12.2.18.11 PHY MMD Access Address/Data Register (PHY_MMD_ADDR_DATA) This register in conjunction with the PHY MMD Access Control Register (PHY_MMD_ACCESS) provides indirect access to the MDIO Manageable Device (MMD) registers. Refer to the MDIO Manageable Device (MMD) Registers on page 263 for additional details. Index (In Decimal): 14 Size: 16 bits Bits Description Type Default 15:0 MMD Register Address/Data If the MMD Function field of the PHY MMD Access Control Register (PHY_MMD_ACCESS) is “00”, this field is used to indicate the MMD register address to read/write of the device specified in the MMD Device Address (DEVAD) field. Otherwise, this register is used to read/write data from/to the previously specified MMD address. R/W 0000h |
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