LAN9250 datasheet(295/421 Pages) MICROCHIP

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 2015 Microchip Technology Inc.

DS00001913A-page 295

LAN9250

13.5.1

EEPROM COMMAND REGISTER (E2P_CMD)

This read/write register is used to control the read and write operations of the serial EEPROM.

Offset:

1B4h

Size:

32 bits

Bits

Description

Type

Default

EEPROM Controller Busy (EPC_BUSY)

When a 1 is written into this bit, the operation specified in the EPC_COM-

MAND field of this register is performed at the specified EEPROM address.

This bit will remain set until the selected operation is complete. In the case of

a read, this indicates that the Host can read valid data from the EEPROM

Data Register (E2P_DATA). The E2P_CMD and E2P_DATA registers should

not be modified until this bit is cleared. In the case where a write is attempted

and an EEPROM is not present, the EPC_BUSY bit remains set until the

EEPROM Controller Timeout (EPC_TIMEOUT) bit is set. At this time the

EPC_BUSY bit is cleared.

Note:

EPC_BUSY is set immediately following power-up, or pin reset, or

DIGITAL_RST reset. This bit is also set following the setting of the

Host MAC Reset (HMAC_RST) bit in the Reset Control Register

(RESET_CTL). After the EEPROM Loader has finished loading, the

EPC_BUSY bit is cleared. Refer to chapter Section 13.4,

"EEPROM Loader," on page 290 for more information.

R/W

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