LAN9250 datasheet(297/421 Pages) MICROCHIP

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 2015 Microchip Technology Inc.

DS00001913A-page 297

LAN9250

13.5.2

EEPROM DATA REGISTER (E2P_DATA)

This read/write register is used in conjunction with the EEPROM Command Register (E2P_CMD) to perform read and

write operations with the serial EEPROM.

EEPROM Controller Timeout (EPC_TIMEOUT)

This bit is set when a timeout occurs, indicating the last operation was unsuc-

cessful. If an EEPROM WRITE operation is performed and no response is

received from the EEPROM within 30 ms, the EEPROM controller will time-

out and return to its idle state.

This bit is also set if the EEPROM fails to respond with the appropriate ACKs,

if the EEPROM slave device holds the clock low for more than 30 ms, if the

I2C bus is not acquired within 1.92 seconds , or if an unsupported

EPC_COMMAND is attempted.

This bit is cleared when written high.

R/WC

Configuration Loaded (CFG_LOADED)

When set, this bit indicates that a valid EEPROM was found and the

EEPROM Loader completed normally. This bit is set upon a successful load.

It is cleared on power-up, pin and DIGITAL_RST resets, Host MAC Reset

(HMAC_RESET), or at the start of a RELOAD.

This bit is cleared when written high.

R/WC

15:0

EEPROM Controller Address (EPC_ADDRESS)

This field is used by the EEPROM Controller to address a specific memory

location in the serial EEPROM. This address must be byte aligned.

R/W

0000h

Offset:

1B8h

Size:

32 bits

Bits

Description

Type

Default

31:8

RESERVED

7:0

EEPROM Data (EEPROM_DATA)

This field contains the data read from or written to the EEPROM.

R/W

00h

Bits

Description

Type

Default

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