LAN9250 datasheet(356/421 Pages) MICROCHIP

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LAN9250

DS00001913A-page 356

 2015 Microchip Technology Inc.

14.8.30

1588 PORT RX PDELAY_REQ INGRESS TIME NANOSECONDS REGISTER

(1588_RX_PDREQ_NS)

This register combined with the 1588 Port RX Pdelay_Req Ingress Time Seconds Register (1588_RX_PDREQ_SEC)

contains the ingress time of the last Pdelay_Req message. This register is automatically updated if the Auto Update

(AUTO) bit is set.

Note:

Port and GPIO registers share a common address space. Port registers are selected by the Bank Select

(BANK_SEL[2:0] in the 1588 Bank Port GPIO Select Register (1588_BANK_PORT_GPIO_SEL).

Offset:

17Ch

Size:

32 bits

Bank:

Bits

Description

Type

Default

Auto Update (AUTO)

If this bit is set, the TS_NS field in this register, the TS_SEC field in

1588_RX_PDREQ_SEC and the CF field in 1588_RX_PDREQ_CF_HI /

1588_RX_PDREQ_CF_LO are updated when a PDelay_Req message is

received.

When cleared, S/W is responsible to maintain those fields.

Note:

The host S/W must not change this bit while the 1588 Enable

(1588_ENABLE) bit in 1588 Command and Control Register

(1588_CMD_CTL) is set.

R/W

RESERVED

29:0

Timestamp NanoSeconds (TS_NS)

This field contains the nanoseconds portion of the receive ingress time.

R/W

00000000h

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