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LAN9250 Datasheet(PDF) 357 Page - Microchip Technology |
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LAN9250 Datasheet(HTML) 357 Page - Microchip Technology |
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357 / 421 page  2015 Microchip Technology Inc. DS00001913A-page 357 LAN9250 14.8.31 1588 PORT RX PDELAY_REQ INGRESS CORRECTION FIELD HIGH REGISTER (1588_RX_PDREQ_CF_HI) This register combined with the 1588 Port RX Pdelay_Req Ingress Correction Field Low Register (1588_RX_P- DREQ_CF_LOW) contains the correction field from the last Pdelay_Req message. Only the nanoseconds portion is used. This register is automatically updated if the Auto Update (AUTO) bit is set. Note: Port and GPIO registers share a common address space. Port registers are selected by the Bank Select (BANK_SEL[2:0] in the 1588 Bank Port GPIO Select Register (1588_BANK_PORT_GPIO_SEL). Offset: 180h Size: 32 bits Bank: 1 Bits Description Type Default 31:0 Correction Field (CF[63:32]) This field contains the upper 32 bits of the correction field. R/W 00000000h |
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