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LAN9250 Datasheet(PDF) 193 Page - Microchip Technology

Part # LAN9250
Description  Integrated Ethernet PHY with HP Auto-MDIX
PDF  421 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9250 Datasheet(HTML) 193 Page - Microchip Technology

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 2015 Microchip Technology Inc.
DS00001913A-page 193
LAN9250
11.15.1
HOST MAC CONTROL REGISTER (HMAC_CR)
This read/write register establishes the RX and TX operation modes and controls for address filtering and packet filter-
ing.
Offset:
01h
Size:
32 bits
Bits
Description
Type
Default
31
Receive All Mode (RXALL)
When set, all incoming packets will be received and passed on to the
address filtering function for processing of the selected filtering mode on the
received frame. Address filtering then occurs and is reported in Receive Sta-
tus. When cleared, only frames that pass Destination Address filtering will be
sent to the application.
R/W
0b
30:26
RESERVED
RO
-
25
Host MAC Energy Efficient Ethernet (HMAC_EEE_ENABLE)
When set, this bit enables EEE operation (both TX LPI and RX LPI)
R/W
Note 7
24
RESERVED
RO
0b
23
Disable Receive Own (RCVOWN)
When set, the Host MAC disables the reception of frames when it is transmit-
ting (TXEN output is asserted). When cleared, the Host MAC receives all
packets, including those transmitted by the Host MAC. This bit has no effect
when the Full Duplex Mode (FDPX) bit is set.
R/W
0b
22
RESERVED
RO
-
21
Loopback operation Mode (LOOPBK)
Selects the loop back operation modes for the Host MAC. This field is only
valid for full duplex mode. In internal loopback mode, the TX frame is
received by the internal MII interface, and sent back to the Host MAC without
being sent to the network.
0: Normal Operation. Loopback disabled.
1: Loopback enabled
Note:
When enabling or disabling the loopback mode it can take up to
10
s for the mode change to occur. The transmitter and receiver
must be stopped and disabled when modifying the LOOPBK bit.
The transmitter or receiver should not be enabled within10
s of
modifying the LOOPBK bit.
R/W
0b
20
Full Duplex Mode (FDPX)
When set, the Host MAC operates in Full-Duplex mode, in which it can trans-
mit and receive simultaneously.
R/W
0b
19
Pass All Multicast (MCPAS)
When set, indicates that all incoming frames with a Multicast destination
address (first bit in the destination address field is 1) are received. Incoming
frames with physical address (Individual Address/Unicast) destinations are
filtered and received only if the address matches the Host MAC Address.
R/W
0b
18
Promiscuous Mode (PRMS)
When set, indicates that any incoming frame is received regardless of its
destination address.
R/W
1b



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