LAN9250 datasheet(195/421 Pages) MICROCHIP

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DS00001913A-page 195

LAN9250

7:6

BackOff Limit (BOLMT)

The BOLMT bits allow the user to set the back-off limit in a relaxed or aggres-

sive mode. According to IEEE 802.3, the Host MAC has to wait for a random

number [r] of slot-times (see note) after it detects a collision, where:

(eq.1)0 < r < 2K

The exponent K is dependent on how many times the current frame to be

transmitted has been retried, as follows:

(eq.2)K = min (n, 10) where n is the current number of retries.

If a frame has been retried three times, then K = 3 and r= 8 slot-times maxi-

mum. If it has been retried 12 times, then K = 10, and r = 1024 slot-times

maximum.

An LFSR (linear feedback shift register) 20-bit counter emulates a 20 bit ran-

dom number generator, from which r is obtained. Once a collision is detected,

the number of the current retry of the current frame is used to obtain K (eq.2).

This value of K translates into the number of bits to use from the LFSR

counter. If the value of K is 3, the Host MAC takes the value in the first three

bits of the LFSR counter and uses it to count down to zero on every slot-time.

This effectively causes the Host MAC to wait eight slot-times. To give the

user more flexibility, the BOLMT value forces the number of bits to be used

from the LFSR counter to a predetermined value as in the table below.

Thus, if the value of K = 10, the Host MAC will look at the BOLMT if it is 00b, then

use the lower ten bits of the LFSR counter for the wait countdown. If the BOLMT is

10b, then it will only use the value in the first four bits for the wait countdown, etc.

Note:

Slot-time = 512 bit times. (See IEEE 802.3 Spec., sections 4.2.3.25

and 4.4.2.1)

R/W

Deferral Check (DFCHK)

When set, enables the deferral check in the Host MAC. The Host MAC will

abort the transmission attempt if it has deferred for more than 24,288 bit

times. Deferral starts when the transmitter is ready to transmit, but is pre-

vented from doing so because the CRS is active. Deferral time is not cumula-

tive. If the transmitter defers for 10,000 bit times, then transmits, collides,

backs off, and then has to defer again after completion of back-off, the defer-

ral timer resets to 0 and restarts. When this bit is cleared, the deferral check

is disabled in the Host MAC and the Host MAC defers indefinitely.

R/W

RESERVED

Transmitter enable (TXEN)

When set, the Host MAC’s transmitter is enabled and it will transmit frames

from the buffer.

When cleared, the Host MAC’s transmitter is disabled and will not transmit

any frames.

R/W

Receiver Enable (RXEN)

When set, the Host MAC’s receiver is enabled and will receive frames.

When cleared, the MAC’s receiver is disabled and will not receive any

frames.

R/W

Bits

Description

Type

Default

BOLMT Value

# Bits Used from LFSR Counter

00b

01b

10b

11b

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