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MCP37231 Datasheet(PDF) 95 Page - Microchip Technology |
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MCP37231 Datasheet(HTML) 95 Page - Microchip Technology |
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95 / 144 page  MCP37231/21-200 AND MCP37D31/21-200 DS20005322D-page 95 2014-2016 Microchip Technology Inc. REGISTER 5-19: ADDRESS 0X5F – PLL ENABLE CONTROL 2(1) R/W-1 R/W-1 R/W-1 R/W-1 R/W-0 R/W-0 R/W-0 R/W-1 FCB<5:2> EN_PLL_OUT EN_PLL_BIAS FCB<1:0> bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-4 FCB<5:2>: Factory-Controlled Bits. This is not for the user. Do not change the default settings. bit 3 EN_PLL_OUT: Enable PLL output. 1 = Enabled 0 = Disabled (Default) bit 2 EN_PLL_BIAS: Enable PLL bias 1 = Enabled 0 = Disabled (Default) bit 1-0 FCB<1:0>: Factory-Controlled Bits. This is not for the user. Do not change default settings. Note 1: To enable PLL output, EN_PLL_OUT, EN_PLL_BIAS and EN_PLL in Address 0x59 (Register 5-14) must be set. |
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