ST2202 datasheet(30/65 Pages) ETC

30 / 65 page

Sitronix

ST2202

Ver 2.0a

30/65

2003-May-05

3.. C

KIIN

G O

Three clocking outputs PE0, PE1 and PE2 are supported by

the ST2202. These signals are very useful for outputs of high

frequency, such as PWM base signal or carrier of remote

control. Timer0, Timer1 overflow signals are clock sources for

PE0 and PE1, while BGRCK are for PE2.

Clocking Outputs: PE0 and PE1

Overflow states of Timers will be connected to toggle data of

PE[0:1] when setting function selection bits TCO0/TCO1

(PMCR[0:1]). Meanwhile PE0/PE1 output clocked data of half

the frequency of Timers. After resetting TCO0/TCO1, the toggle

operation ceases. Then PE0/PE1 return to the original logic

level of PE[0:1].

Clocking Output: PE2

BGRCK will output through PE2 when setting function selection

bit BCO (PMCR[2]). If BCO is cleared, PE2 returns to the

original logic level of PE[2].

Summary of clocking outputs registers is shown in TABLE 13-1.

The clocking outputs enable bits can be found in TABLE 13-2.

TABLE 13-1 Summary Of Clocking Outputs Registers

Address

Name

R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

$004

R/W

PE[7]

PE[6]

PE[5]

PE[4]

PE[3]

PE[2]

PE[1]

PE[0]

1111 1111

$00C

PCE

R/W

PCE[7]

PCE[6]

PCE[5]

PCE[4]

PCE[3]

PCE[2]

PCE[1]

PCE[0]

0000 0000

$00F

PMCR

R/W

PULL

PDBN

INTEG

CSM1

CSM0

BCO

TCO1

TCO0

1000 -000

TABLE 13-2 Port Miscellaneous Control Register (PMCR)

Address Name

R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

$00F

PMCR

R/W

PULL

PDBN

INTEG

CSM1

CSM0

BCO

TCO1

TCO0

1000 0000

Bit 0: TCO0 : Clocking output PE0 control bit (sourced from Timer0)

0 = Disable clocking output of PE0

1 = Enable clocking output of PE0

Bit 1: TCO1 : Clocking output PE1 control bit (sourced from Timer1)

0 = Disable clocking output of PE1

1 = Enable clocking output of PE1

Bit 2: BCO : Clock signal output PE2 control bit (sourced from BGRCK)

0 = Disable clock signal output of PE2

1 = Enable clock signal output of PE2

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