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ST2202 Datasheet(PDF) 36 Page - List of Unclassifed Manufacturers

Part # ST2202
Description  8 BIT Integrated Microcontroller with 256K Bytes ROM
PDF  65 Pages
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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ST2202 Datasheet(HTML) 36 Page - List of Unclassifed Manufacturers

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Sitronix
ST2202
Ver 2.0a
36/65
2003-May-05
15.1 Sample Rate Control
PSG1L and PSG1H control the sample rate. PSG1[11~6]
controls PWM repeat times (usually set=111100 for four
times of DAC reload) and PSG1[5~0] usually set ‘1’. The
input clock source is controlled by PCK[2~0]. The block
diagram is shown as the following:
Sample Rate Generator
CK_IN
Enable
Output
PSG1[11~0]
PWM Generator
DAC[7~0]
Enable
Fs
PO
POB
Reload_DAC
INH
DAC[7~0]
DMD[0]
DMD[1]
BD
PSG1[11~0]
PSGCK
Fs
BDB
DACE
Reload_DAC
DMD[0]
DMD[1]
FIGURE 15-1 DAC Diagram
RC
OSCX
PSGC[6~4]
IN0
IN1
Output
Select
PSG Selector
PSGCK
PSGC
SYSCK
PSGCK
SYSCK/2
SYSCK/4
SYSCK/8
SYSCK x 2
OSCX
B6 B5 B4
0
0
0
X
X
0
1
1
1
1
1
1
1
0
1
0
0
0
FIGURE 15-2 DAC Clock Source Control
TABLE 15-4 DAC Sample Rate Description (RCOSC = 2MHz)
DAC interrupt frequency
PWM frequency
PSGC b6, b5, b4
PSG1H, PSG1L
8K
32K
100
00001111, 00111111
16K
32K
100
00001111, 10111111



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