AD9174 datasheet(55/164 Pages) AD

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Data Sheet

AD9174

Rev. A | Page 55 of 164

Channel Interpolation

The channel interpolation options available are bypass (1×), 2×,

3×, 4×, 6×, and 8×. Each of the half-band filters used for

interpolation has up to 80% bandwidths with 85 dB of stop

band rejection. The channel half-band cascaded configuration

is shown in Figure 73, with each of the useable bandwidths of

the channel interpolation filters listed in Table 37.

HB2

2×

HB0

2×

HB1

2×

TB0

3×

Figure 73. Channel Interpolation Half-Band Filter Block Diagram

Table 37. Channel Interpolation Useable Bandwidths and

Rejection

Half-Band

Filter

Bandwidth

(×fIN_FILTER) (%)

Stop Band Rejection (dB)

HB0, TB0

HB1

HB2

fIN_FILTER is the frequency at the input of the half-band filter.

Channel Digital Modulation

Each channelizer includes a 48-bit dual-modulus NCO to allow

I/Q modulation of each channel data to an independent carrier

frequency, each with its own phase offset control. The 48-bit

NCO can be configured into either integer or modulus (DDS)

mode. In modulus mode, the A/B ratio added to the integer FTW

of the NCO allows the frequency to be synthesized with near

infinite precision. See the 48-Bit Integer/Modulus NCO section

for more details. NCO mode is selected as shown in Table 38.

These controls are paged per the channel page masks in the

CHANNEL_PAGE bits (Register 0x008, Bits[5:0]).

Table 38. Channel Modulation Mode Selection

Modulation Mode

Modulation Type

Bit 6

Bit 2

None

0b0

48-Bit Integer NCO

0b1

0b0

48-Bit Dual Modulus NCO

0b1

The channel NCO blocks also contain sideband selection

controls as well as options for how the FTW and phase offset

controls are updated. The phase offset word control can be

calculated as follows:

−180° ≤ Degrees Offset ≤ +180°

Degrees Offset = 180° × (DDSC_NCO_PHASE_OFFSET/215)

where DDSC_NCO_PHASE_OFFSET is a 16-bit twos complement

value programmed in the registers listed in Table 39.

Table 39. Channel NCO Phase Offset Registers

Address Value

Description

0x138

DDSC_NCO_PHASE_OFFSET[7:0]

8 LSBs of phase offset

0x139

DDSC_NCO_PHASE_OFFSET[15:8]

8 MSBs of phase offset

48-Bit Integer/Modulus NCO

The 48-bit integer/modulus NCO combines an NCO block, a

phase shifter, and a complex modulator to modulate the signal

onto a user defined carrier frequency, as shown in Figure 74. This

configuration allows output signals to be shifted anywhere

across the output spectrum up to ±fNCO/2 with very fine

frequency resolution.

The NCO produces a quadrature carrier to translate the input

signal to a new center frequency. A quadrature carrier is a pair

of sinusoidal waveforms of the same frequency, offset 90° from

each other. The frequency of the quadrature carrier is set using

the FTW. The quadrature carrier is mixed with the I and Q data

and then summed into the I and Q datapaths, as shown in

Figure 74.

Each of the channel 48-bit NCOs can be configured to run in

integer mode (that is, when only the FTW value defines the

NCO output frequency). The value of the FTW in part depends

on the clock speed at which the NCO block is running (fNCO,CLK).

For any channel NCO, the clock rate is equal to the rate of the

summing node (maximum of 1.575 GSPS) and can be

calculated by using the following formulas:

fNCO,CLK = fDATA × Channel Interpolation

fNCO,CLK = fDAC/Main Interpolation = fSUMMING_NODE

The FTWs for each individual NCO can be programmed

separately and are calculated by using the following formula:

− fNCO,CLK/2 ≤ fCARRIER < + fNCO,CLK/2

DDSC_FTW = (fCARRIER/fNCO,CLK) × 248

where:

DDSC_FTW is a 48-bit, twos complement number.

fCARRIER is the output frequency of the NCO.

fNCO,CLK is the sampling clock frequency of the NCO.

The frequency tuning word is set as shown in Table 40.

Table 40. Channel NCO FTW Registers

Address

Value

Description

0x132

DDSC_FTW[7:0]

8 LSBs of FTW

0x133

DDSC_FTW[15:8]

Next eight bits of FTW

0x134

DDSC_FTW[23:16]

Next eight bits of FTW

0x135

DDSC_FTW[31:24]

Next eight bits of FTW

0x136

DDSC_FTW[39:32]

Next eight bits of FTW

0x137

DDSC_FTW[47:40]

8 MSBs of FTW

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