AD9174 datasheet(78/164 Pages) AD

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AD9174

Data Sheet

Rev. A | Page 78 of 164

Table 56 lists optional registers to configure the channel datapaths if they are being configured for a specific application. If the channel

datapaths are bypassed (CH_INTERP_MODE = 1 for 1× channel interpolation), Table 56 can be skipped in the start-up sequence.

Table 56. Channel Datapath Setup: Digital Gain and Channel NCOs

R/W

Bits

Value

Description

0x008

[5:0]

CHANNEL_PAGE. Select the channels to be programmed at the same time (or repeat this block for each

channel to independently program values). Bit x of this control corresponds to the Channel x datapath.

0x146

[7:0]

CHNL_GAIN[7:0]. Write LSBs of channel digital gain. Configure digital gain for selected channels in

Paging Register 0x008. Calculation: CHNL_GAIN = 211 × 10(dB Gain/20) where dB Gain is the gain value

in dB for the channel gain desired.

0x147

[7:0]

CHNL_GAIN[11:8]. Write MSBs of channel digital gain. Calculations shown in Register 0x146.

0x130

Enable NCO for selected channels in paging Register 0x008.

0b0 = disable NCO.

0b1 = enable NCO.

Enable NCO modulus for selected channels in paging Register 0x008.

0b0 = disable NCO modulus.

0b1 = enable NCO modulus.

Select sideband from modulation result.

0b0 = upper sideband.

0b1 = lower sideband (spectral flip).

If dc test mode or NCO test mode is desired, set this bit to 1 to enable the test tone generation.

Otherwise, set this bit to the default value of 0.

Integer NCO mode calculation: DDSC_FTW = (fCARRIER/fNCO) × 248, where fNCO = fDATA/CH_INTERP_MODE.

0x132

[7:0]

Write DDSC_FTW[7:0].

0x133

[7:0]

Write DDSC_FTW[15:8].

0x134

[7:0]

Write DDSC_FTW[23:16].

0x135

[7:0]

Write DDSC_FTW[31:24].

0x136

[7:0]

Write DDSC_FTW[39:32].

0x137

[7:0]

Write DDSC_FTW[47:40].

0x138

[7:0]

Write DDSC_NCO_PHASE_OFFSET[7:0]. Calculation: DDSC_NCO_PHASE_OFFSET = (Degrees Offset/180) ×

215.

0x139

[7:0]

Write DDSC_NCO_PHASE_OFFSET[15:8].

If using NCO modulus mode, also program modulus parameters. If not, skip this section. For modulus

NCO mode: (fCARRIER/fNCO) = (X + (A/B))/248 where DDSC_ACC_DELTA = A, DDSC_ACC_MODULUS = B, and

DDSC_FTW = X.

0x13A

[7:0]

Write DDSC_ACC_MODULUS[7:0].

0x13B

[7:0]

Write DDSC_ACC_MODULUS[15:8].

0x13C

[7:0]

Write DDSC_ACC_MODULUS[23:16].

0x13D

[7:0]

Write DDSC_ACC_MODULUS[31:24].

0x13E

[7:0]

Write DDSC_ACC_MODULUS[39:32].

0x13F

[7:0]

Write DDSC_ACC_MODULUS[47:40].

0x140

[7:0]

Write DDSC_ACC_DELTA[7:0].

0x141

[7:0]

Write DDSC_ACC_DELTA[15:8].

0x142

[7:0]

Write DDSC_ACC_DELTA[23:16].

0x143

[7:0]

Write DDSC_ACC_DELTA[31:24].

0x144

[7:0]

Write DDSC_ACC_DELTA[39:32].

0x145

[7:0]

Write DDSC_ACC_DELTA[47:40].

0x131

0b1

Update all NCO phase and FTW words.

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