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AD9174 Datasheet(PDF) 15 Page - Analog Devices |
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AD9174 Datasheet(HTML) 15 Page - Analog Devices |
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15 / 164 page ![]() Data Sheet AD9174 Rev. A | Page 15 of 164 ABSOLUTE MAXIMUM RATINGS Table 10. Parameter Rating ISET, FILT_COARSE, FILT_BYP, FILT_VCM −0.3 V to AVDD1.8 + 0.3 V SERDINx± −0.2 V to SVDD1.0 + 0.2 V SYNCOUT0±, SYNCOUT1±, RESET, TXEN0, TXEN1, IRQ0, IRQ1, CS, SCLK, SDIO, SDO −0.3 V to DVDD1.8 + 0.3 V DAC0±, DAC1±, CLKIN±, CLKOUT±, FILT_FINE −0.2 V to AVDD1.0 + 0.2 V SYSREF± −0.2 V to DVDD1.0 + 0.2 V AVDD1.0, DVDD1.0, SVDD1.0 to GND −0.2 V to +1.2 V AVDD1.8, DVDD1.8 to GND −0.3 V to 2.2 V Maximum Junction Temperature (TJ)1 118°C Storage Temperature Range −65°C to +150°C Reflow 260°C 1 Some operating modes of the device may cause the device to approach or exceed the maximum junction temperature during operation at supported ambient temperatures. Removal of heat from the device may require additional measures such as active airflow, heat sinks, or other measures. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. REFLOW PROFILE The AD9174 reflow profile is in accordance with the JEDEC JESD20 criteria for Pb-free devices. The maximum reflow temperature is 260°C. THERMAL CHARACTERISTICS Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. θJA is the natural convection junction to ambient thermal resistance measured in a one cubic foot sealed enclosure. θJC is the junction to case thermal resistance. Thermal resistances and thermal characterization parameters are specified vs. the number of PCB layers in different airflow velocities (in m/sec). The use of appropriate thermal management tech- niques is recommended to ensure that the maximum junction temperature does not exceed the limits shown in Table 10. Use the values in Table 11 in compliance with JEDEC 51-12. Table 11. Simulated Thermal Resistance vs. PCB Layers1 PCB Type Airflow Velocity (m/sec) θJA θJC_TOP θJC_BOT Unit JEDEC 2s2p Board 0.0 25.3 2.43 3.04 °C/W 1.0 22.6 N/A N/A °C/W 2.5 21.0 N/A N/A °C/W 12-Layer PCB2 0.0 15.4 2.4 2.6 °C/W 1.0 13.1 N/A N/A °C/W 2.5 11.6 N/A N/A °C/W 1 N/A means not applicable. 2 Non JEDEC thermal resistance. 3 1SOP PCB with no vias in PCB. 4 1SOP PCB with 7 × 7 standard JEDEC vias. ESD CAUTION |
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