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DS3173N Datasheet(PDF) 6 Page - Dallas Semiconductor |
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DS3173N Datasheet(HTML) 6 Page - Dallas Semiconductor |
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6 / 232 page ![]() DS3171/DS3172/DS3173/DS3174 6 of 230 10.10.4 Transmit Line Interface ...................................................................................................................... 105 10.10.5 Receive Line Interface ....................................................................................................................... 105 10.10.6 B3ZS/HDB3 Decoder ......................................................................................................................... 105 10.11 BERT......................................................................................................................................................... 107 10.11.1 General Description ........................................................................................................................... 107 10.11.2 Features ............................................................................................................................................. 107 10.11.3 Configuration and Monitoring............................................................................................................. 107 10.11.4 Receive Pattern Detection ................................................................................................................. 108 10.11.5 Transmit Pattern Generation.............................................................................................................. 110 10.12 LIU – LINE INTERFACE UNIT ........................................................................................................................ 111 10.12.1 General Description ........................................................................................................................... 111 10.12.2 Features ............................................................................................................................................. 111 10.12.3 Detailed Description ........................................................................................................................... 112 10.12.4 Transmitter ......................................................................................................................................... 112 10.12.5 Receiver ............................................................................................................................................. 113 11 OVERALL REGISTER MAP 116 12 REGISTER MAPS AND DESCRIPTIONS 119 12.1 REGISTERS BIT MAPS.................................................................................................................................. 119 12.1.1 Global Register Bit Map ..................................................................................................................... 119 12.1.2 HDLC Register Bit Map...................................................................................................................... 122 12.1.3 T3 Register Bit Map ........................................................................................................................... 124 12.1.4 E3 G.751 Register Bit Map ................................................................................................................ 124 12.1.5 E3 G.832 Register Bit Map ................................................................................................................ 125 12.1.6 Clear Channel Register Bit Map ........................................................................................................ 126 12.2 GLOBAL REGISTERS .................................................................................................................................... 127 12.2.1 Register Bit Descriptions.................................................................................................................... 127 12.3 PER PORT COMMON.................................................................................................................................... 135 12.3.1 Register Bit Descriptions.................................................................................................................... 135 12.4 BERT......................................................................................................................................................... 146 12.4.1 BERT Register Map ........................................................................................................................... 146 12.4.2 BERT Register Bit Descriptions ......................................................................................................... 146 12.5 B3ZS/HDB3 LINE ENCODER/DECODER ....................................................................................................... 153 12.5.1 Transmit Side Line Encoder/Decoder Register Map ......................................................................... 153 12.5.2 Receive Side Line Encoder/Decoder Register Map .......................................................................... 154 12.6 HDLC......................................................................................................................................................... 158 12.6.1 HDLC Transmit Side Register Map.................................................................................................... 158 12.6.2 HDLC Receive Side Register Map..................................................................................................... 161 12.7 FEAC CONTROLLER ................................................................................................................................... 165 12.7.1 FEAC Transmit Side Register Map.................................................................................................... 165 12.7.2 FEAC Receive Side Register Map..................................................................................................... 167 12.8 TRAIL TRACE............................................................................................................................................... 170 12.8.1 Trail Trace Transmit Side................................................................................................................... 170 12.8.2 Trail Trace Receive Side Register Map ............................................................................................. 171 12.9 DS3/E3 FRAMER ........................................................................................................................................ 176 12.9.1 Transmit DS3 ..................................................................................................................................... 176 12.9.2 Receive DS3 Register Map................................................................................................................ 178 12.9.3 Transmit G.751 E3 ............................................................................................................................. 186 12.9.4 Receive G.751 E3 Register Map ....................................................................................................... 188 12.9.5 Transmit G.832 E3 Register Map ...................................................................................................... 193 12.9.6 Receive G.832 E3 Register Map ....................................................................................................... 196 12.9.7 Transmit Clear Channel ..................................................................................................................... 204 12.9.8 Receive Clear Channel ...................................................................................................................... 205 13 JTAG INFORMATION 207 13.1 JTAG DESCRIPTION.................................................................................................................................... 207 13.2 JTAG TAP CONTROLLER STATE MACHINE DESCRIPTION ............................................................................. 207 13.3 JTAG INSTRUCTION REGISTER AND INSTRUCTIONS ...................................................................................... 209 |
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