FXLS93421 datasheet(194/254 Pages) NXP

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NXP Semiconductors

FXLS9xxxx

Dual channel inertial sensor

Error condition

Error code Error response

Test Mode Enabled

Latched until reset

Offset Error

Latched until reset.[1]

Temperature Error

Latched until reset

Memory Error

Latched until reset

Self-test Error

0x1EA

Latched until reset.[2]

Device Not Locked

Table 286. Standard error reporting...continued

[1]

An offset error on either channel results in an offset error response from both channels.

[2]

A self-test error on either channel results in a self-test error response from both channels.

13.9.5.2 PSI5 error extension option

If the PSI5 error extension option is enabled, additional error reporting is available as

shown in Table 287.

Error condition

Error code Error response

Supply Error

Temporary (Normal transmissions continue once condition is removed)

Communication Error

0x1EF

Temporary (Normal transmissions continue once condition is removed)

Test Mode Enabled

0x1EE

Latched until reset

Offset Error

0x1ED

Latched until reset.[1]

Temperature Error

0x1EC

Latched until reset

Memory Error

0x1EB

Latched until reset

Self-test Error

0x1EA

Latched until reset.[2]

Device Not Locked

Table 287. PSI5 error extension option

[1]

An offset error on either channel results in an offset error response from both channels.

[2]

A self-test error on either channel results in a self-test error response from both channels.

13.10 PSI5 programming mode

PSI5 Programming mode is a synchronous communication mode that allows for

bidirectional communication with the device. Programming mode is intended for factory

programming of the OTP array and reading of diagnostic information. It is not intended

for use in normal operation.

13.10.1 PSI5 programming mode entry

The device enters programming mode if and only if the following sequence occurs:

1. At least 31 sync pulses are detected, directly preceding the Programming Mode Entry

Short Command during the Programming Mode Entry Window shown in Figure 89.

• The window timing is defined in Section 10.12 (tPME).

• The Sync pulses and Programming Mode Entry command must be received with a

sync pulse period of tS-S_PM

If the Programming Mode entry requirement is not met:

FXLS9xxxx

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 8 February 2021

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