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FXLS93421 Datasheet(PDF) 192 Page - NXP Semiconductors

Part # FXLS93421
Description  Dual channel inertial sensor
PDF  254 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXLS93421 Datasheet(HTML) 192 Page - NXP Semiconductors

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NXP Semiconductors
FXLS9xxxx
Dual channel inertial sensor
initialization phase 3. Once the error is no longer present, the device will complete
initialization phase 2 as necessary and then transition to initialization phase 3.
Error condition
Effect on initialization phase 2
Supply Error
Temporary, Sync Pulses Ignored
Communication Error
No Effect
Test Mode Enabled
No Effect
Offset Error
No Effect
Temperature Error
No Effect. The device will attempt to transmit Initialization Phase 2 data.
Memory Error
No Effect. The device will attempt to transmit Initialization Phase 2 data.
Self-test Error
No Effect
Device Not Locked
No Effect
Table 282. Initialization phase 2 error handling
13.9.3 Initialization phase 3 error handling
Table 283 shows the effect of internal failure modes on the initialization phase 3
procedures. Some errors occurring in initialization phase 3 will prevent entry into run
mode until the error is no longer present. Once the error is no longer present, one or
more Sensor Ready commands are transmitted before entering Run Mode.
Error condition
Effect on initialization phase 3
Supply Error
Temporary, Sync Pulses Ignored
Communication Error
No Effect
Test Mode Enabled
No Effect
Offset Error
No Effect
Temperature Error
No Effect. The device will attempt to transmit Initialization Phase 3 data.
Memory Error
No Effect. The device will attempt to transmit Initialization Phase 3 data.
Self-test Error
No Effect
Device Not Locked
Sensor Ready replaced with Sensor Ready, but Not Locked Transmission (UF2 Region is
un-programmed)
Table 283. Initialization phase 3 error handling
13.9.4 Normal mode error handling with internal error automatic clearing
Section 13.9.4.1 and Section 13.9.4.2 summarize the error reporting if the
PSI5_ERRLATCH bit is not set. A single error transmission clears the device status
allowing for temporary error conditions to be cleared once the error condition is removed.
13.9.4.1 Standard error reporting
Table 284 summarizes the error reporting in normal mode if the PSI5 error extension
option is disabled.
FXLS9xxxx
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 6 — 8 February 2021
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