CEC1712 datasheet(144/338 Pages) MICROCHIP

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CEC1712

DS00003416C-page 144

 2020-2021 Microchip Technology Inc.

APPLICATION NOTE:

All GPIO interrupt detection configurations default to '0000', which is low level interrupt. Having interrupt detection

enabled will un-gated the clock to the GPIO module whenever the interrupt is active, which increases power con-

sumption. Interrupt detection should be disabled when not required to save power.

Changing the configuration of the Interrupt edge and detection bits may generate an interrupt if it is enabled. The

GPIO should be configured and associated status bits should be cleared before enabling the Interrupt.

11.6.1.2

Pin Control Register 2

TABLE 11-3:

EDGE ENABLE AND INTERRUPT DETECTION BITS DEFINITION

Edge

Enable

Interrupt Detection Bits

Selected Function

0000

Low Level Sensitive

0001

High Level Sensitive

0010

Reserved

0011

Reserved

0100

Interrupt events are disabled

0101

Reserved

0110

Reserved

0111

Reserved

1101

Rising Edge Triggered

1110

Falling Edge Triggered

1111

Either Edge Triggered

Note:

Only edge triggered interrupts can wake up the main ring oscillator. The GPIO must be enabled for edge-

triggered interrupts and the GPIO interrupt must be enabled in the interrupt aggregator in order to wake up

the ring when the ring is shut down.

Offset

See Note 11-1

Bits

Description

Type

Default

Reset

Event

31:6

Reserved

RES

5:4

DRIVE_STRENGTH

These bits are used to select the drive strength on the pin.

00 = 2mA

01 = 4mA

10 = 8mA

11 = 12mA

R/W

RESET_S

CEC1712 Datasheet(PDF) 144 Page - Microchip Technology

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