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CS47L35 Datasheet(PDF) 295 Page - Cirrus Logic

Part # CS47L35
Description  Smart Codec with Low-Power Audio DSP
PDF  300 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS47L35 Datasheet(HTML) 295 Page - Cirrus Logic

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DS1085F3
295
CS47L35
6 Register Map
R1572370
(17FE12h)
DSP2_WDMA_Buffer_2
DSP2_START_ADDRESS_WDMA_BUFFER_3 [15:0]
00000000h
DSP2_START_ADDRESS_WDMA_BUFFER_2 [15:0]
R1572372
(17FE14h)
DSP2_WDMA_Buffer_3
DSP2_START_ADDRESS_WDMA_BUFFER_5 [15:0]
00000000h
DSP2_START_ADDRESS_WDMA_BUFFER_4 [15:0]
R1572374
(17FE16h)
DSP2_WDMA_Buffer_4
DSP2_START_ADDRESS_WDMA_BUFFER_7 [15:0]
00000000h
DSP2_START_ADDRESS_WDMA_BUFFER_6 [15:0]
R1572384
(17FE20h)
DSP2_RDMA_Buffer_1
DSP2_START_ADDRESS_RDMA_BUFFER_1 [15:0]
00000000h
DSP2_START_ADDRESS_RDMA_BUFFER_0 [15:0]
R1572386
(17FE22h)
DSP2_RDMA_Buffer_2
DSP2_START_ADDRESS_RDMA_BUFFER_3 [15:0]
00000000h
DSP2_START_ADDRESS_RDMA_BUFFER_2 [15:0]
R1572388
(17FE24h)
DSP2_RDMA_Buffer_3
DSP2_START_ADDRESS_RDMA_BUFFER_5 [15:0]
00000000h
DSP2_START_ADDRESS_RDMA_BUFFER_4 [15:0]
R1572400
(17FE30h)
DSP2_DMA_Config_1
0
0
0
0
0
0
0
0
DSP2_WDMA_CHANNEL_ENABLE [7:0]
00000000h
0
0
DSP2_DMA_BUFFER_LENGTH [13:0]
R1572402
(17FE32h)
DSP2_DMA_Config_2
0
0
0
000
000
00
000
00
00000000h
0
0
0
0
0
0
0
0
DSP2_WDMA_CHANNEL_OFFSET [7:0]
R1572404
(17FE34h)
DSP2_DMA_Config_3
0
0
0
0
0
0
0
0
0
0
DSP2_RDMA_CHANNEL_OFFSET [5:0]
00000000h
0
0
0
000
000
0
DSP2_RDMA_CHANNEL_ENABLE [5:0]
R1572406
(17FE36h)
DSP2_DMA_Config_4
0
0
0
000
000
00
000
00
00000000h
0
0
0
000
000
00
000
0
DSP2_
DMA_
WORD_
SEL
R1572408
(17FE38h)
DSP2_External_Start
0
0
0
000
000
00
000
00
00000000h
0
0
0
000
000
00
DSP2_START_IN_SEL [4:0]
R1572416
(17FE40h)
DSP2_Scratch_1
DSP2_SCRATCH_1 [15:0]
00000000h
DSP2_SCRATCH_0 [15:0]
R1572418
(17FE42h)
DSP2_Scratch_2
DSP2_SCRATCH_3 [15:0]
00000000h
DSP2_SCRATCH_2 [15:0]
R1572434
(17FE52h)
DSP2_Bus_Error_Addr
DSP2_BUS_ERROR_ADDR_HI [15:0]
00000000h
DSP2_BUS_ERROR_ADDR_LOW [15:0]
R1572436
(17FE54h)
DSP2_Ext_window_A
DSP2_
EXT_A_
PSIZE16
00
000
000
00
000
00
00000000h
DSP2_EXT_A_PAGE [15:0]
R1572438
(17FE56h)
DSP2_Ext_window_B
DSP2_
EXT_B_
PSIZE16
00
000
000
00
000
00
00000000h
DSP2_EXT_B_PAGE [15:0]
R1572440
(17FE58h)
DSP2_Ext_window_C
DSP2_
EXT_C_
PSIZE16
00
000
000
00
000
00
00000000h
DSP2_EXT_C_PAGE [15:0]
R1572442
(17FE5Ah)
DSP2_Ext_window_D
DSP2_
EXT_D_
PSIZE16
00
000
000
00
000
00
00000000h
DSP2_EXT_D_PAGE [15:0]
R1572448
(17FE60h)
DSP2_Identity
0
0
0
000
000
00
000
00
00000000h
0
0
0
000
000
00
DSP2_CORE_NUMBER [4:0]
R1572864
(180000h)
DSP3_PMEM_0
0
0
0
0
0
0
0
0
DSP3_PM_START [39:32]
00000000h
DSP3_PM_START [31:16]
R1572866
(180002h)
DSP3_PMEM_1
DSP3_PM_START [15:0]
00000000h
0
0
0
000
00
DSP3_PM_1 [39:32]
R1572868
(180004h)
DSP3_PMEM_2
DSP3_PM_1 [31:16]
00000000h
DSP3_PM_1 [15:0]
R1634298
(18EFFAh)
DSP3_PMEM_30717
0
0
0
0
0
0
0
0
DSP3_PM_20478 [39:32]
00000000h
DSP3_PM_20478 [31:16]
R1634300
(18EFFCh)
DSP3_PMEM_30718
DSP3_PM_20478 [15:0]
00000000h
0
0
0
000
00
DSP3_PM_END [39:32]
R1634302
(18EFFEh)
DSP3_PMEM_30719
DSP3_PM_END [31:16]
00000000h
DSP3_PM_END [15:0]
R1703936
(1A0000h)
DSP3_XMEM_0
0
0
0
0
0
0
0
0
DSP3_XM_START [23:16]
00000000h
DSP3_XM_START [15:0]
R1703938
(1A0002h)
DSP3_XMEM_1
0
0
0
000
00
DSP3_XM_1 [23:16]
00000000h
DSP3_XM_1 [15:0]
R1777660
(1B1FFCh)
DSP3_XMEM_36862
0
0
0
0
0
0
0
0
DSP3_XM_36862 [23:16]
00000000h
DSP3_XM_36862 [15:0]
R1777662
(1B1FFEh)
DSP3_XMEM_36863
0
0
0
000
00
DSP3_XM_END [23:16]
00000000h
DSP3_XM_END [15:0]
R1794048
(1B6000h)
DSP3_XMEM_EXT_0
0
0
0
0
0
0
0
0
DSP3_XM_EXT_START [23:16]
00000000h
DSP3_XM_EXT_START [15:0]
R1794050
(1B6002h)
DSP3_XMEM_EXT_1
0
0
0
0
0
0
0
0
DSP3_XM_EXT_1 [23:16]
00000000h
DSP3_XM_EXT_1 [15:0]
R1802236
(1B7FFCh)
DSP3_XMEM_EXT_
4094
0
0
0
0
0
0
0
0
DSP3_XM_EXT_4094 [23:16]
00000000h
DSP3_XM_EXT_4094 [15:0]
Table 6-2. Register Map Definition—32-bit region (Cont.)
Register
Name
31
15
30
14
29
13
28
12
27
11
26
10
25
9
24
8
23
7
22
6
21
5
20
4
19
3
18
2
17
1
16
0
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