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IRCC2.0 Datasheet(PDF) 39 Page - SMSC Corporation |
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IRCC2.0 Datasheet(HTML) 39 Page - SMSC Corporation |
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39 / 87 page ![]() 39 REGISTER BLOCK THREE Register Block Three contains the IrCC 2.0 Block Identifier Registers. These read-only registers classify the hardware Manufacturer, the Device ID, the Version number, and Host interface parameters. Bits and registers marked “reserved” in the table below cannot be written and return 0x when read. Programmers must set reserved bits to 0 when writing to registers that contain reserved bits. Table 27 - Register Block Three Address Direction Description Default A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 RO SMSC ID (high-byte) '10'hex 0 0 1 RO SMSC ID (low-byte) 'B8'hex 0 1 0 RO CHIP ID 'F2'hex 0 1 1 RO VERSION Number '00'hex 1 0 0 RO IRQ Level DMA Channel Note 1 1 0 1 RO Software Select A Note 1 1 1 0 RO Software Select B Note 1 Note 1: The default values for these registers assume the values that have been programmed in chip- level configuration registers. SMSC ID (Addresses 0 - 1) The SMSC ID registers contain a 16 bit manufacturer identification code. Address zero contains the high byte of this code, address one contains the low byte. Chip ID (Address 2) The Chip ID register specifically identifies this SMSC product. Version Number (Address 3) The Version Number register identifies the revision-level of the product referenced by the Chip ID register. IRQ Level/ DMA Channel (Address 4) IRQ Level, bits 4 - 7 The IRQ Level bits identify the current active IRQ number for this device. The value comes from the 4 bit IRQ Level Bus found in the Interface Description. DMA Channel, bits 0 - 3 The DMA Channel bits identify the current active DMA Channel number for this device. The value comes from the 4 bit DMA Channel Bus found in the Interface Description. Software Select A (Address 5) The Software Select A register is software-only controlled from a chip-level configuration register (see the IrCC 2.0-Specific Chip-Level Controls section on page 7). Software Select B (Address 6) The Software Select B register is software-only controlled from a chip-level configuration register (see the IrCC 2.0-Specific Chip-Level Controls section on page 7). |
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