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AT91 Datasheet(PDF) 101 Page - ATMEL Corporation |
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AT91 Datasheet(HTML) 101 Page - ATMEL Corporation |
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101 / 153 page ![]() 101 AT91X40 Series 1354D–ATARM–08/02 Receiver Asynchronous Receiver The USART is configured for asynchronous operation when SYNC = 0 (bit 7 of US_MR). In Asynchronous Mode, the USART detects the start of a received character by sampling the RXD signal until it detects a valid start bit. A low level (space) on RXD is interpreted as a valid start bit if it is detected for more than 7 cycles of the sampling clock, which is 16 times the baud rate. Hence a space which is longer than 7/16 of the bit period is detected as a valid start bit. A space which is 7/16 of a bit period or shorter is ignored and the receiver continues to wait for a valid start bit. When a valid start bit has been detected, the receiver samples the RXD at the theoreti- cal mid-point of each bit. It is assumed that each bit lasts 16 cycles of the sampling clock (one bit period) so the sampling point is 8 cycles (0.5 bit periods) after the start of the bit. The first sampling point is therefore 24 cycles (1.5 bit periods) after the falling edge of the start bit was detected. Each subsequent bit is sampled 16 cycles (1 bit period) after the previous one. Figure 38. Asynchronous Mode: Start Bit Detection Figure 39. Asynchronous Mode: Character Reception 16 x Baud Rate Clock RXD True Start Detection D0 Sampling D0 D1 D2 D3 D4 D5 D6 D7 RXD True Start Detection Sampling Parity Bit Stop Bit Example: 8-bit, parity enabled 1 stop 1 bit period 0.5 bit periods |
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