AT91 datasheet(104/153 Pages) ATMEL

104 / 153 page

104

AT91X40 Series

1354D–ATARM–08/02

Break

A break condition is a low signal level which has a duration of at least one character

(including start/stop bits and parity).

Transmit Break

The transmitter generates a break condition on the TXD line when STTBRK is set in

US_CR (Control Register). In this case, the character present in the Transmit Shift Reg-

ister is completed before the line is held low.

To cancel a break condition on the TXD line, the STPBRK command in US_CR must be

set. The USART completes a minimum break duration of one character length. The TXD

line then returns to high level (idle state) for at least 12 bit periods to ensure that the end

of break is correctly detected. Then the transmitter resumes normal operation.

The BREAK is managed like a character:

•

The STTBRK and the STPBRK commands are performed only if the transmitter is

ready (bit TXRDY = 1 in US_CSR)

•

The STTBRK command blocks the transmitter holding register (bit TXRDY is

cleared in US_CSR) until the break has started

•

A break is started when the Shift Register is empty (any previous character is fully

transmitted). TXEMPTY is cleared in US_CSR. The break blocks the transmitter

shift register until it is completed (high level for at least 12-bit periods after the

STPBRK command is requested)

In order to avoid unpredictable states:

•

STTBRK and STPBRK commands must not be requested at the same time

•

Once an STTBRK command is requested, further STTBRK commands are ignored

until the BREAK is ended (high level for at least 12-bit periods)

•

All STPBRK commands requested without a previous STTBRK command are

ignored

•

A byte written into the Transmit Holding Register while a break is pending but not

started (US_CSR.TXRDY = 0) is ignored

•It is

not permitted to write new data in the Transmit Holding Register while a break is

in progress (STPBRK has not been requested), even though TXRDY = 1 in

US_CSR.

•

A new STTBRK command

must not be issued until an existing break has ended

(TXEMPTY = 1 in US_CSR)

The standard break transmission sequence is:

Wait for the transmitter ready

(US_CSR.TXRDY = 1)

Send the STTBRK command

(write 0x0200 to US_CR)

Wait for the transmitter ready

(TXRDY = 1 in US_CSR)

Send the STPBRK command

(write 0x0400 to US_CR)

The next byte can then be sent:

Wait for the transmitter ready

(TXRDY = 1 in US_CSR)

Send the next byte

(write byte to US_THR)

AT91 Datasheet(PDF) 104 Page - ATMEL Corporation

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