CLRC663 datasheet(174/177 Pages) NXP

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NXP Semiconductors

CLRC663

High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus

Figures

Fig. 1.

Simplified block diagram of the CLRC663 .........7

Fig. 2.

Pinning configuration HVQFN32

(SOT617-1) ........................................................8

Fig. 3.

Detailed block diagram of the CLRC663 ......... 11

Fig. 4.

Read/write mode ............................................. 15

Fig. 5.

Read/write mode for ISO/IEC 14443 type A

and read/write mode for MIFARE Classic ........15

Fig. 6.

Data coding and framing according to ISO/

IEC 14443 A ................................................... 16

Fig. 7.

ISO/IEC 14443 type B communication

diagram ............................................................16

Fig. 8.

SOF and EOF according to ISO/IEC 14443

B ...................................................................... 17

Fig. 9.

FeliCa read/write communication diagram ...... 17

Fig. 10.

Data coding according to ISO/IEC 15693.

standard mode reader to label ........................ 19

Fig. 11.

Passive communication mode .........................20

Fig. 12.

Connection to host with SPI ............................22

Fig. 13.

Connection to host with SPI ............................24

Fig. 14.

Example for UART Read ................................ 26

Fig. 15.

Example diagram for a UART write .................26

Fig. 16.

I2C-bus interface .............................................27

Fig. 17.

Bit transfer on the I2C-bus ..............................27

Fig. 18.

START and STOP conditions ..........................28

Fig. 19.

Acknowledge on the I2C- bus ......................... 28

Fig. 20.

Data transfer on the I2C- bus ......................... 29

Fig. 21.

First byte following the START procedure ....... 29

Fig. 22.

Fig. 23.

I2C interface enables convenient MIFARE

SAM integration ...............................................32

Fig. 24.

Boundary scan cell path structure ...................34

Fig. 25.

General dependences of modulation .............. 38

Fig. 26.

Example 1: overshoot_t1 = 2d; overhoot_t2

= 5d. ................................................................40

Fig. 27.

Example 2: overshoot_t1 = 0d; overhoot_t2

= 5d .................................................................41

Fig. 28.

Block diagram of receiver circuitry .................. 42

Fig. 29.

Block diagram of the active Antenna

concept ............................................................43

Fig. 30.

Overview SIGIN/SIGOUT Signal Routing ........44

Fig. 31.

Sector arrangement of the EEPROM .............. 46

Fig. 32.

Crystal connection ...........................................50

Fig. 33.

Internal PDown to voltage regulator logic ........53

Fig. 34.

Pin RX input voltage ..................................... 121

Fig. 35.

Timing for fast and standard mode devices

on the I2C-bus .............................................. 122

Fig. 36.

Typical application antenna circuit diagram ...123

Fig. 37.

Package outline SOT-617-1 (HVQFN32) ...... 125

Fig. 38.

VFBGA36 Package outline ............................126

Fig. 39.

VFBGA36 Package outline notes ..................127

Fig. 40.

VFBGA36 PCB design: Solder mask

opening pattern ............................................. 128

Fig. 41.

VFBGA36 PCB design: I/O pads and

solderable area ............................................. 129

Fig. 42.

VFBGA36 PCB design: Solder paste

stencil ............................................................ 130

Fig. 43.

HVQFN32 Package marking .........................131

Fig. 44.

VFBGA36 Package marking ......................... 131

Fig. 45.

Packing information 1 tray .............................133

Fig. 46.

Packing information 5 tray .............................134

Fig. 47.

Tray details ....................................................135

Fig. 48.

Packing information Reel .............................. 136

CLRC663

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Product data sheet

Rev. 5.3 — 3 January 2024

174 / 177

CLRC663 Datasheet(PDF) 174 Page - NXP Semiconductors

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