CLRC663 datasheet(176/177 Pages) NXP

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NXP Semiconductors

CLRC663

High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus

8.10.3.6 Receive command ...........................................55

8.10.3.7 Transmit command .......................................... 55

8.10.3.8 Transceive command .......................................56

8.10.3.9 WriteE2 command ........................................... 56

8.10.3.10 WriteE2PAGE command ..................................56

8.10.3.11 ReadE2 command ...........................................56

8.10.3.12 LoadReg command ......................................... 56

8.10.3.13 LoadProtocol command ...................................56

8.10.3.14 LoadKeyE2 command ..................................... 58

8.10.3.15 StoreKeyE2 command .....................................58

8.10.3.16 GetRNR command .......................................... 58

8.10.3.17 SoftReset command ........................................ 58

CLRC663 registers .........................................60

9.1

9.2

Command configuration ...................................63

9.2.1

Command ........................................................ 63

9.3

SAM configuration register .............................. 63

9.3.1

HostCtrl ............................................................63

9.4

FIFO configuration register ..............................64

9.4.1

FIFOControl ..................................................... 64

9.4.2

WaterLevel .......................................................65

9.4.3

FIFOLength ......................................................65

9.4.4

FIFOData ......................................................... 66

9.5

Interrupt configuration registers ....................... 66

9.5.1

IRQ0 register ................................................... 66

9.5.2

IRQ1 register ................................................... 67

9.5.3

IRQ0En register ...............................................67

9.5.4

IRQ1En ............................................................ 68

9.6

Contactless interface configuration

registers ........................................................... 69

9.6.1

Error .................................................................69

9.6.2

Status ...............................................................70

9.6.3

RxBitCtrl ...........................................................70

9.6.4

RxColl .............................................................. 71

9.7

Timer configuration registers ........................... 72

9.7.1

TControl ........................................................... 72

9.7.2

T0Control ......................................................... 73

9.7.2.1

T0ReloadHi ......................................................73

9.7.2.2

T0ReloadLo ..................................................... 74

9.7.2.3

T0CounterValHi ................................................74

9.7.2.4

T0CounterValLo ............................................... 74

9.7.2.5

T1Control ......................................................... 75

9.7.2.6

T1ReloadHi ......................................................75

9.7.2.7

T1ReloadLo ..................................................... 76

9.7.2.8

T1CounterValHi ................................................76

9.7.2.9

T1CounterValLo ............................................... 76

9.7.2.10 T2Control ......................................................... 77

9.7.2.11 T2ReloadHi ......................................................77

9.7.2.12 T2ReloadLo ..................................................... 78

9.7.2.13 T2CounterValHi ................................................78

9.7.2.14 T2CounterValLoReg ........................................ 78

9.7.2.15 T3Control ......................................................... 79

9.7.2.16 T3ReloadHi ......................................................79

9.7.2.17 T3ReloadLo ..................................................... 80

9.7.2.18 T3CounterValHi ................................................80

9.7.2.19 T3CounterValLo ............................................... 80

9.7.2.20 T4Control ......................................................... 81

9.7.2.21 T4ReloadHi ......................................................81

9.7.2.22 T4ReloadLo ..................................................... 82

9.7.2.23 T4CounterValHi ................................................82

9.7.2.24 T4CounterValLo ............................................... 82

9.8

Transmitter driver configuration registers .........83

9.8.1

DrvMode .......................................................... 83

9.8.2

TxAmp ..............................................................83

9.8.3

TxCon .............................................................. 84

9.8.4

Txl .................................................................... 84

9.9

Transmitter CRC configuration registers ..........85

9.9.1

TxCrcPreset .....................................................85

9.9.2

RxCrcCon ........................................................ 86

9.10

Transmitter data configuration registers ...........86

9.10.1

TxDataNum ......................................................86

9.10.2

TxDATAModWidth ............................................87

9.10.3

TxSym10BurstLen ........................................... 87

9.10.4

TxWaitCtrl ........................................................ 88

9.10.5

TxWaitLo ..........................................................89

9.11

FrameCon ........................................................89

9.12

Receiver configuration registers ...................... 90

9.12.1

RxSofD .............................................................90

9.12.2

RxCtrl ...............................................................90

9.12.3

RxWait ............................................................. 91

9.12.4

RxThreshold .....................................................91

9.12.5

Rcv ...................................................................92

9.12.6

RxAna .............................................................. 92

9.13

Clock configuration .......................................... 94

9.13.1

SerialSpeed ..................................................... 94

9.13.2

LFO_Trimm ......................................................95

9.13.3

PLL_Ctrl Register ............................................ 95

9.13.4

PLLDiv_Out ......................................................96

9.14

Low-power card detection configuration

registers ........................................................... 97

9.14.1

LPCD_QMin .....................................................97

9.14.2

LPCD_QMax ....................................................97

9.14.3

LPCD_IMin .......................................................97

9.14.4

LPCD_Result_I ................................................ 98

9.14.5

LPCD_Result_Q .............................................. 98

9.14.6

LPCD_Options .................................................98

9.15

Pin configuration ..............................................99

9.15.1

PadEn .............................................................. 99

9.15.2

PadOut ...........................................................100

9.15.3

PadIn ..............................................................100

9.15.4

SigOut ............................................................101

9.16

Protocol configuration registers ..................... 102

9.16.1

TxBitMod ........................................................102

9.16.2

TxDataCon .....................................................102

9.16.3

TxDataMod .................................................... 103

9.16.4

TxSymFreq .................................................... 104

9.16.5

TxSym0 ..........................................................105

9.16.6

TxSym1 ..........................................................105

9.16.7

TxSym2 ..........................................................106

9.16.8

TxSym3 ..........................................................106

9.16.9

TxSym10Len ..................................................107

9.16.10 TxSym32Len ..................................................107

9.16.11

TxSym10BurstCtrl ..........................................107

9.16.12 TxSym10Mod Reg .........................................108

9.16.13 TxSym32Mod .................................................109

9.17

Receiver configuration ................................... 109

9.17.1

RxBitMod ....................................................... 109

9.17.2

RxEofSym ......................................................110

CLRC663

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Product data sheet

Rev. 5.3 — 3 January 2024

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