VNF9D5F datasheet(44/106 Pages) STMICROELECTRONICS

44 / 106 page

OUTSRx

Output status register channels 0 to 1

R/C

Address:

0x20h to 0x21h

Type:

R/C

Reset:

Description:

Output status register channels 0 to 1

[15]

Direct input status, image of associated DI logic level according to OTP allocation

[14]

[13]

Capacitive charging mode status bit

[12]

Channel feedback status. Combination of power limitation and overtemperature

[11]

VDS feedback status.

VDSHSRx bit is ‘1’ when VOUTx is lower than VDSH_TH (= VCC - 1.5 V).

If VDSHSR is ‘1’ in on-state (after a proper delay time depending on the capacitive load connected to the output x), this is

indicative of a potential overload condition.

If VDSHSR is ‘0’ in offstate (after a proper delay time depending on the capacitive load connected to the output x), this is

indicative of a potential fault condition stuck to VCC/open-load off state.

[10]

ITOFFSR is ‘1’ when I²t curve protection is active and it is switching off the channel x

[9]

Output pull up generator status

[8]

Channel latch-off status. This bit is set when overload blanking time has elapse and channel is latched off. This bit must be

cleared to re-enable the output channel.

An SPI R&C operation on OUTSRx register will not clear this bit. This bit can be cleared only with a write operation on the

corresponding CHLOFFTCRx register.

[7]

Chip reset

[6]

SPI Error

[5]

PWM clock frequency too low

[4]

VCC undervoltage

[3]

This bit is set if the frame temperature is greater than the threshold (140 ºC) and can be used as a temperature pre-warning.

The bit is cleared automatically when the frame temperature drops below the case-temperature reset threshold (TCR3).

[2]

This bit is set if the frame temperature is greater than the threshold (130 ºC) and can be used as a temperature pre-warning.

The bit is cleared automatically when the frame temperature drops below the case-temperature reset threshold (TCR2).

[1]

This bit is set if the frame temperature is greater than the threshold (120 ºC) and can be used as a temperature pre-warning.

The bit is cleared automatically when the frame temperature drops below the case-temperature reset threshold (TCR1).

[0]

Parity bit

Note:

The output status register reports the status of the selected channel based on the configuration register and in

case of fault condition.

VNF9D5F

SPI functional description

DS13946 - Rev 6

page 44/106

VNF9D5F Datasheet(PDF) 44 Page - STMicroelectronics

VNF9D5F Datasheet(HTML) 44 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL