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VNF9D5F Datasheet(PDF) 29 Page - STMicroelectronics

Part # VNF9D5F
Description  2-channel high-side driver with STi²Fuse protection for automotive power distribution applications
PDF  106 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VNF9D5F Datasheet(HTML) 29 Page - STMicroelectronics

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4.3.4
SPI modes
By reading out the <SPI Mode> register general information of SPI usage of the device application registers can
be read.
Table 27. SPI Mode
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Content
BR
DL2
DL1
DL0
SPI8
0
S1
S0
A1H
SPI Burst Read
Table 28. SPI Burst Read
Bit 7
Description
0
BR disabled
1
BR enabled
The Burst Read is implemented in this product so this bit is enabled.
SPI Data Length
The SPI Data Length value indicates the length of the SCK count monitor which is running for all the accesses to
the Device Application Registers. In case a communication frame with an SCK count is not equal to the reported
one, the device will lead to a SPI Error and the data will be rejected.
The Frame Length is specified on 3 bits in the SPI Mode register located in the ROM part.
The 24-bit SPI communication is implemented in this product, so these bits are ‘010’.
Table 29. SPI Data Length
Bit 6
Bit 5
Bit 4
Description
DL2
DL1
DL0
0
0
0
Invalid
0
0
1
16 bit SPI
0
1
0
24 bit SPI
...
...
1
1
1
64 bit SPI
Data Consistency Check (Parity/CRC)
For some devices a Data Consistency Check is required. Therefore, either a parity-check or for very sensitive
systems a CRC may be implemented.
It is defined on 2 bits, in the SPI Mode register located in the ROM Part. A check is then applied on the incoming
frame (SDI) while a calculation elaborated on one/multiple bits is done and integrated on the outgoing frame
(SDO).
Table 30. SPI Data Consistency Check
Bit 1
Bit 0
Description
S1
S0
0
0
Not used
0
1
Parity used
1
0
CRC used
VNF9D5F
SPI functional description
DS13946 - Rev 6
page 29/106



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