VNF9D5F datasheet(24/106 Pages) STMICROELECTRONICS

24 / 106 page

Figure 16. SPI write operation

SDI

SDO

CSN

MSB

Address

Command Byte

(8 bits)

Global Status Byte

MSB

LSB

MSB

(previous content of register)

Data

(16 bits)

Data

LSB

Read mode

The read mode of the device allows to read and to check the state of any register. Incoming data are sampled on

the rising edge of the serial clock (SCK), MSB first.

The command byte allows to determine which register content is read, whilst the other two data bytes are "don't

care".

In case of a read mode on an unused address, the global status/error byte on the SDO pin is followed by 0x0000

word.

In order to avoid inconsistency between the Global Status byte and the Status register, the Status register

contents are frozen during the SPI communication.

Figure 17. SPI read operation

SDI

SDO

CSN

(16bit)

Don’t care

(16bit)

Data

MSB

LSB

MSB Address

(8bit)

Global Status Byte

Command Byte

LSB

MSB

Read and clear status command

The read and clear status operation is used to clear the content of the addressed status register (see Table 25). A

read and clear status operation with address 0x3Fh clears all Status registers simultaneously.

Incoming data are sampled on the rising edge of the serial clock (SCK), MSB first. The command byte allows to

determine which register content is read and the payload bits set to 1 into the data byte determine the bits into the

Outgoing data are shifted out MSB first on the falling edge of the CSN pin and others on the falling edge of the

serial clock (SCK). The first byte corresponds to the Global Status byte and the second to the content of the

addressed register.

In order to avoid inconsistency between the Global Status byte and the Status register, the Status register

contents are frozen during SPI communication.

VNF9D5F

SPI functional description

DS13946 - Rev 6

page 24/106

VNF9D5F Datasheet(PDF) 24 Page - STMicroelectronics

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