VNF9D5F datasheet(17/106 Pages) STMICROELECTRONICS

17 / 106 page

Figure 9. Lowest (left hand) and highest (right hand) INOM and tNOM configuration setting on a 1 mm2 wire

The I²t protection curve consists of 13 steps, each of them corresponding to a specific current threshold.

Whenever the load current exceeds a threshold, a counter is counting up. If for instance looking at the example in

Figure 7, the current would exceed the value of INOM = 10 A, but stay below the current threshold of the next step,

which is set at 1.03* INOM about, the counter would reach its threshold value after tNOM = 300 s, the harness

protection is triggered and the output channel is automatically latched off.

Diagnostic about I²t intervention is available through SPI with the ITOFFSRx bit in the OUTSRx output status

harness I²t protection. An additional diagnostic indication is available, depending on the configuration of MCUext

bit in the OTP memory area. The following table explains the functionality of DINx pins depending on the MCUext

bit setting.

Table 11. DINx pin functionality

MCUext bit

DIN0

DIN1

Global I²t status (active low) OR combination of all channels

Global I²t unlatch pin for all channels (active high)

1 (default)

Direct input

In case MCUext = 0, DIN0 acts as an open drain global I²t status pin with an OR combination of all channels. The

DIN0 pin is active low, in case at least one channel has latched off for wire harness I²t protection. The I²t latch can

be cleared by clearing:

•

The ITOFFSRx bit through R&C command

•

Low to high transition on DIN1 pin, it remains at high level for at least t_DIN_UNLATCH, then pulls low

DIN1 pin. If more than one channel is latched for wire harness I²t protection, this unlatches all channels at

the same time.

Consequently, bit 3 in the global status byte is cleared and the channel is restarted. The I²t counter is NOT reset,

it keeps its actual value reached during down-counting while the channel was latched.

In the case MCUext = 0, both possibilities for unlatching are available in normal mode and fail-safe mode.

However, ITOFFSRx bit and bit 3 in the global status byte is cleared only through the R&C command.

In case MCUext = 1, diagnostic and unlatch control is available only through SPI; however, in fail-safe mode wire

harness I²t protection is in auto restart mode, unlatching the channel when the I²t counter counted down to 0.

The speed of the counter up-counting (fixed drop, refer to Table 12) is increased every time the load current

reaches the next staircase current threshold of the I²t curve. Every time the load current drops below the INOM

threshold the counter is decreasing. The speed of the down-counting depends on how far the load current is

below the INOM. This algorithm perfectly emulates a continuous RMS (root mean square) current integration,

which in fact is the proper indicator to measure the losses in the wire by Joule effect, causing the temperature rise

in the wire.

VNF9D5F

Protections

DS13946 - Rev 6

page 17/106

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