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VNF9D5F Datasheet(PDF) 38 Page - STMicroelectronics |
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VNF9D5F Datasheet(HTML) 38 Page - STMicroelectronics |
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38 / 106 page ![]() CHLOFFTCR 0x, 1x Channel latch off timer control register 0x, 1x 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R/W - R Address: 0x10h Type: R/W Reset: 0 Description: Channel latch off timer control register 0x, 1x [15:12] - [11:8] To configure the output behavior in case of power limitation for the corresponding channel 1 [7:4] To configure the output behavior in case of power limitation for the corresponding channel 0 [3:1] - [0] Parity bit VNF9D5F SPI functional description DS13946 - Rev 6 page 38/106 |
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