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PM73121 Datasheet(PDF) 41 Page - PMC-Sierra, Inc

Part # PM73121
Description  AAL1 Segmentation And Reassembly Processor
PDF  223 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM73121 Datasheet(HTML) 41 Page - PMC-Sierra, Inc

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PM73121 AAL1gator II
PMC-Sierra, Inc.
PMC-980620
,VVXH
AAL1 SAR Processor
Data Sheet
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3
THEORY OF OPERATIONS
The AAL1gator II is divided into the following major blocks, all of which are explained in this
section:
•
Transmit Frame Transfer Controller (TFTC) block
•
Cell Service Decision (CSD) block
•
Transmit Adaptation Layer Processor (TALP) block
•
Transmit UTOPIA Interface (TUTOPIA) block
•
Memory Interface and Arbitration Controller (MIAC) block
•
Receive Frame Transfer Controller (RFTC) block
•
Receive Adaptation Layer Processor (RALP) block
•
Receive UTOPIA Interface (RUTOPIA) block
Figure 10 shows a block diagram of the AAL1gator II and the sequence of events used to segment
and reassemble the CBR data.
1. TFTC stores line data into the memory, 16 bits at a time.
2. When the TFTC finishes writing a complete frame into the memory, it notifies the CSD of a
Figure 10.
AAL1gator II Block Diagram
Transmit
Frame
Transfer
Controller
(TFTC)
Transmit
Adaptation
Layer
Processor
(TALP)
Transmit
UTOPIA
Interface
Block
(TUTOPIA)
Memory
Interface and
Arbitration
Controller
(MIAC)
Receive
Frame
Transfer
Controller
(RFTC)
Receive
Adaptation
Layer
Processor
(RALP)
Receive
UTOPIA
Interface
Block
(RUTOPIA)
Input from Line
Output to UTOPIA
Input from UTOPIA
Output to Line
Microprocessor
Control Bus
To External Memory
Cell Service
Decision
(CSD)
1
2
3
4
5
6
9
8
7
10
AAL1gator II
(PM73121)



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