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PM73121 Datasheet(PDF) 98 Page - PMC-Sierra, Inc

Part # PM73121
Description  AAL1 Segmentation And Reassembly Processor
PDF  223 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM73121 Datasheet(HTML) 98 Page - PMC-Sierra, Inc

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PM73121 AAL1gator II
PMC-Sierra, Inc.
PMC-980620
,VVXH
AAL1 SAR Processor
Data Sheet
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4.3
Pin Descriptions
4.3.1
UTOPIA Interface Signals
NOTE: Unless stated otherwise, the maximum output current (I
MAX) is 4 mA.
Table 6.
UTOPIA Interface Signals
ATM Mode
Signal
PHY Mode
Signal
Pin #
Type
Reset
Value*
Description
PHY_ENABLE
PHY_ENABLE
56
In
NA
PHY_ENABLE determines which UTOPIA mode the
UTOPIA interface is configured. When 0, the chip is
configured with an ATM layer UTOPIA interface and
when 1, the chip is configured with a PHY layer
UTOPIA interface. An internal pulldown resistor will
default the chip to the ATM layer mode if left
unconnected.
TATM_CLK
RPHY_CLK
20
In
NA
ATM: Transmit UTOPIA ATM Layer Clock is the
synchronization clock input for synchronizing data
output on TATM_DATA.
PHY: Receive UTOPIA PHY Layer Clock is the
synchronization clock input for synchronizing data
output on RPHY_DATA.
Maximum frequency is 33 MHz.
TATM_SOC
RPHY_SOC
24
Out
0(ATM)
Z(PHY)
ATM: Transmit UTOPIA ATM Layer Start-Of-Cell is
an active high signal asserted by the AAL1gator II
when TATM_DATA contains the first valid byte of
the cell.
PHY: Receive UTOPIA PHY Layer Start-Of-Cell is
an active high signal asserted by the AAL1gator II
when RPHY_DATA contains the first valid byte of
the cell. In SPHY mode, the AAL1gator II drives this
signal only in cycles following those with /RPHY_EN
asserted. In MPHY mode, the AAL1gator II drives
this signal only when the ATM layer has selected it
for a cell transfer.
Maximum output current (I
MAX) = 8 mA.
TATM_DATA(7:4)
TATM_DATA(3)
TATM_DATA(2:0)
RPHY_DATA(7:4)
RPHY_DATA(3)
RPHY_DATA(2:0)
25-28
30
32-34
Out
0(ATM)
Z(PHY)
ATM: Transmit UTOPIA ATM Layer Data Bits 7 to 0
form the byte-wide data driven to the PHY layer. Bit 0
is the Least Significant Bit (LSB). Bit 7 is the Most
Significant Bit (MSB) and should be transmitted first.
PHY: Receive UTOPIA PHY Layer Data Bits 7 to 0
form the byte-wide data driven to the ATM layer. In
SPHY mode, the AAL1gator II drives this bus only in
cycles following those with /RPHY_EN asserted. In
MPHY mode, the AAL1gator II drives this bus only
when the ATM layer has selected it for a cell transfer.
Bit 0 is the LSB. Bit 7 is the MSB and should be
transmitted first.
Maximum output current (I
MAX) = 8 mA.



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