Electronic Components Datasheet Search
  English  ▼

X  

PM73121 Datasheet(PDF) 102 Page - PMC-Sierra, Inc

Part # PM73121
Description  AAL1 Segmentation And Reassembly Processor
PDF  223 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM73121 Datasheet(HTML) 102 Page - PMC-Sierra, Inc

Back Button PM73121 Datasheet HTML 98Page - PMC-Sierra, Inc PM73121 Datasheet HTML 99Page - PMC-Sierra, Inc PM73121 Datasheet HTML 100Page - PMC-Sierra, Inc PM73121 Datasheet HTML 101Page - PMC-Sierra, Inc PM73121 Datasheet HTML 102Page - PMC-Sierra, Inc PM73121 Datasheet HTML 103Page - PMC-Sierra, Inc PM73121 Datasheet HTML 104Page - PMC-Sierra, Inc PM73121 Datasheet HTML 105Page - PMC-Sierra, Inc PM73121 Datasheet HTML 106Page - PMC-Sierra, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 102 / 223 page
background image
PM73121 AAL1gator II
PMC-Sierra, Inc.
PMC-980620
,VVXH
AAL1 SAR Processor
Data Sheet
QSPQSD@U6S`Ã6I9Ã8PIAD9@IUD6GÃUPÃQH8TD@SS6ÃDI8Ã6I9ÃAPSÃDUTÃ8VTUPH@ST¶ÃDIU@SI6GÃVT@

TL_SIG(7)
TL_SIG(6)
TL_SIG(5)
TL_SIG(4)
TL_SIG(3)
TL_SIG(2)
TL_SIG(1)
TL_SIG(0)
152
139
127
111
99
80
68
49
Out
0
Transmit Line Signal Bits 7 to 0 are the CAS signaling outputs
to the corresponding framer devices in the SDF-MF mode.
Maximum output current (IMAX) = 8 mA.
TL_MSYNC(7)
TL_MSYNC(6)
TL_MSYNC(5)
TL_MSYNC(4)
TL_MSYNC(3)
TL_MSYNC(2)
TL_MSYNC(1)
TL_MSYNC(0)
154
141
129
113
101
82
70
51
In
NA
Transmit Line Multiframe Synchronization Bits 7 to 0 carry
multiframe timing information from the corresponding framer
devices. These signals do not need to indicate the start of each
and every multiframe. They can occur infrequently. Each time
one of these signals has an edge to indicate the start of a
multiframe, the AAL1gator II re-aligns the multiframe
according to where the edge occurred. Tie to ground if not used.
TL_SER(7)
TL_SER(6)
TL_SER(5)
TL_SER(4)
TL_SER(3)
TL_SER(2)
TL_SER(1)
TL_SER(0)
153
140
128
112
100
81
69
50
Out
0
Transmit Line Serial Data Bits 7 to 0 carry the received data to
the corresponding framer devices. In the UDF-HS mode, only
line 0 is active.
Maximum output current (IMAX) = 8 mA.
RL_SIG(7)
RL_SIG(6)
RL_SIG(5)
RL_SIG(4)
RL_SIG(3)
RL_SIG(2)
RL_SIG(1)
RL_SIG(0)
162
149
137
125
109
97
78
66
In
NA
Receive Line Signal Bits 7 to 0 carry the CAS signaling
information from the corresponding framer devices in SDF-MF
mode. In UDF-HS mode, only line 0 is active.
RL_SER(7)
RL_SER(6)
RL_SER(5)
RL_SER(4)
RL_SER(3)
RL_SER(2)
RL_SER(1)
RL_SER(0)
161
148
136
124
108
96
77
65
In
NA
Receive Line Serial Data Bits 7 to 0 carry the receive data from
the corresponding framer devices.
Table 8.
T1/E1 Interface Signals (Continued)
Signals
Pin #
Type
Reset
Value*
Description



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com