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PM73121 Datasheet(PDF) 104 Page - PMC-Sierra, Inc |
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PM73121 Datasheet(HTML) 104 Page - PMC-Sierra, Inc |
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104 / 223 page  PM73121 AAL1gator II PMC-Sierra, Inc. PMC-980620 ,VVXH AAL1 SAR Processor Data Sheet QSPQSD@U6S`Ã6I9Ã8PIAD9@IUD6GÃUPÃQH8TD@SS6ÃDI8Ã6I9ÃAPSÃDUTÃ8VTUPH@ST¶ÃDIU@SI6GÃVT@ TLCLK_OUTPUT_EN 79 In NA Transmit Line Clock Output Enable controls whether or not the TL_CLK lines are inputs or outputs between the time of hardware reset and when the CLK_SOURCE bits are read. If high, all TL_CLK pins are outputs. If low, all TL_CLK pins are inputs. There is an internal pull-down resistor, so all TL_CLK pins are inputs if the pin is not connected. The value of this input is overwritten by the CLK_SOURCE bits in the LIN_ STR_MODE register (refer to section 7.4.3 “LIN_STR_ MODE” starting on page 126). *Present when /RESET is asserted and SYS_CLK is being clocked. Table 8. T1/E1 Interface Signals (Continued) Signals Pin # Type Reset Value* Description |
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