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PM73121 Datasheet(PDF) 89 Page - PMC-Sierra, Inc |
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PM73121 Datasheet(HTML) 89 Page - PMC-Sierra, Inc |
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89 / 223 page  PM73121 AAL1gator II PMC-Sierra, Inc. PMC-980620 ,VVXH AAL1 SAR Processor Data Sheet QSPQSD@U6S`Ã6I9Ã8PIAD9@IUD6GÃUPÃQH8TD@SS6ÃDI8Ã6I9ÃAPSÃDUTÃ8VTUPH@ST¶ÃDIU@SI6GÃVT@ The adaptive clocking mechanism shares the SRTS port with the SRTS mechanism. It operates according to the following psuedocode: If an SRTS difference value is ready, it is played out with SRTS_STRB asserted and ADAP_STRB deasserted. The SRTS values have higher priority than the adaptive clock values. Else if a channel pair is being serviced, start a state machine to play out the channel status, as shown in Table 3 on page 72, asserting ADAP_STRB as each state is played out. Else if a cell is received and a valid frame difference can be computed, start a state machine to play out the frame difference and queue number, as shown in Table 4 on page 72, asserting ADAP_STRB as each state is played out. The playout of the channel status may interrupt the playout of the frame difference at any point. Table 3. Channel Status SRTS_LINE(3:0) Value SRTS_DOUT(3:0) Value 3210 15 0 line(2) line(1) line(0) 14 channel(4) channel(3) channel(2) channel(1) 13 underrun_h resume_h underrun_1 resume_1 NOTES: • The underrun bit goes high when underrun occurs and will stay high until the underrun condition is cleared. • Resume goes high when the underrun condition is cleared and goes low when the read pointer equals the underrun_end pointer. • The status is played out once for every 16 receive line clocks. • The channel values (4:1) identify 16 channel pairs. The odd and even numbered channels of each pair are carried by the high and low bits, respectively. • For UDF-ML mode, the values in channel (4:1) and underrun_l can be ignored. Line (2:0) indicate the line number and underrun_h represents the queue status. Table 4. Frame Difference SRTS_LINE(3:0) Value SRTS_DOUT(3:0) Value 3210 5 cell_vci(7) cell_vci(6) cell_vci(5) cell_vci(4) 4 cell_vci(3) cell_vci(2) cell_vci(1) cell_vci(0) |
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